run 16 chip masking
Updated on Mon, 2016-03-14 14:13. Originally created by bouchet on 2016-03-10 09:38.
file = /star/data03/daq/2016/063/17063042/st_physics_17063042_raw_1000002.daq
1) occupancy side P after CMN correction
2) occupancy side N after CMN correction
3) comments
Occupancy is set at 0.1 ==> chip removed if its occupancy is > 10% (~13 strips)
Scanning few runs from 17046047 to 17063045, an average of 40 (30) chips is masked on P-side (N-side)
Details is here (look for the last 3 slides for the related run numbers)
1) occupancy side P after CMN correction
2) occupancy side N after CMN correction
3) comments
- few chips remain to be masked (for this run) after the CMN correction
- the main difference with run-14, run-15 is that there is no more the chipCorrect table
- therefore the occupancy looks a bit higher
cut used : 0.01 number of chip(s) masked on P-side : 1315 (/1940) number of chip(s) masked on N-side : 1285 (/1940)4) Masking tables for run 17063042, 17063045
Occupancy is set at 0.1 ==> chip removed if its occupancy is > 10% (~13 strips)
Scanning few runs from 17046047 to 17063045, an average of 40 (30) chips is masked on P-side (N-side)
Details is here (look for the last 3 slides for the related run numbers)
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