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EEmapTP.h
1 #ifdef EEmapFEE_USE
2 
3 // used to emulate Endcap FEE TP math
4 struct EEfeeTPmap {
5  int JP;
6  const char* name;
7  int lenCh, cha0L, cha0H;
8 };
9 
10 // this is mapping of 90 Endcap TP to ADC channels, utilized by constructor of EEfeeTP class.
11 
12 struct EEfeeTPmap eeTPmap[90]={
13  /* syntax: EEfeeTP(crate, TPname, lenCh, chL, [chH])
14  feeTP[nn] uses Hank's indexing
15  see Steve's color map of TP for explanation */
16 
17  /*:::::::::: J E T.....P A T C H......T H R E E .........*/
18  /*......... DSM0 board 1 .... */
19  {3,"JP3_TP1D1/0",10,3,11},
20  {3,"JP3_TP2D1/1",8,80,-1},
21  {3,"JP3_TP4D1/2",10,19,27},
22  {3,"JP3_TP5D1/3",8,88,-1},
23  {3,"JP3_TP7D1/4",10,35,43},
24  {3,"JP3_TP8D1/5",8,96,-1},
25  {3,"JP3_TP10D1/6",10,51,59},
26  {3,"JP3_TP11D1/7",8,104,-1},
27  {3,"JP3_TP13D1/8",10,67,75},
28  {3,"JP3_TP14D1/9",8,112,-1},
29 
30  /*......... DSM0 board 2 */
31  {3,"JP3_TP3D2/0",6,0,8},
32  {3,"JP3_TP6D2/1",6,16,24},
33  {3,"JP3_TP9D2/2",6,32,40},
34  {3,"JP3_TP12D2/3",6,48,56},
35  {3,"JP3_TP15D2/4",6,64,72},
36 
37  /*:::::::::: J E T.....P A T C H......F O U R .........*/
38 
39  {4,"JP4_TP3D2/5",6,0,8},
40  {4,"JP4_TP6D2/6",6,16,24},
41  {4,"JP4_TP9D2/7",6,32,40},
42  {4,"JP4_TP12D2/8",6,48,56},
43  {4,"JP4_TP15D2/9",6,64,72},
44 
45  /*......... DSM0 board 3 ..... */
46  {4,"JP4_TP1D3/0",10,3,11},
47  {4,"JP4_TP2D3/1",8,80,-1},
48  {4,"JP4_TP4D3/2",10,19,27},
49  {4,"JP4_TP5D3/3",8,88,-1},
50  {4,"JP4_TP7D3/4",10,35,43},
51  {4,"JP4_TP8D3/5",8,96,-1},
52  {4,"JP4_TP10D3/6",10,51,59},
53  {4,"JP4_TP11D3/7",8,104,-1},
54  {4,"JP4_TP13D3/8",10,67,75},
55  {4,"JP4_TP14D3/9",8,112,-1},
56 
57  /*:::::::::: J E T.....P A T C H......F I V E .........*/
58  /*......... DSM0 board 4 .... */
59  {5,"JP5_TP1D4/0",10,3,11},
60  {5,"JP5_TP2D4/1",8,80,-1},
61  {5,"JP5_TP4D4/2",10,19,27},
62  {5,"JP5_TP5D4/3",8,88,-1},
63  {5,"JP5_TP7D4/4",10,35,43},
64  {5,"JP5_TP8D4/5",8,96,-1},
65  {5,"JP5_TP10D4/6",10,51,59},
66  {5,"JP5_TP11D4/7",8,104,-1},
67  {5,"JP5_TP13D4/8",10,67,75},
68  {5,"JP5_TP14D4/9",8,112,-1},
69 
70  /*......... DSM0 board 5 */
71  {5,"JP5_TP3D5/0",6,0,8},
72  {5,"JP5_TP6D5/1",6,16,24},
73  {5,"JP5_TP9D5/2",6,32,40},
74  {5,"JP5_TP12D5/3",6,48,56},
75  {5,"JP5_TP15D5/4",6,64,72},
76 
77  /*:::::::::: J E T.....P A T C H......S I X .........*/
78 
79  {6,"JP6_TP3D5/5",6,0,8},
80  {6,"JP6_TP6D5/6",6,16,24},
81  {6,"JP6_TP9D5/7",6,32,40},
82  {6,"JP6_TP12D5/8",6,48,56},
83  {6,"JP6_TP15D5/9",6,64,72},
84 
85  /*......... DSM0 board 6 ..... */
86  {6,"JP6_TP1D6/0",10,3,11},
87  {6,"JP6_TP2D6/1",8,80,-1},
88  {6,"JP6_TP4D6/2",10,19,27},
89  {6,"JP6_TP5D6/3",8,88,-1},
90  {6,"JP6_TP7D6/4",10,35,43},
91  {6,"JP6_TP8D6/5",8,96,-1},
92  {6,"JP6_TP10D6/6",10,51,59},
93  {6,"JP6_TP11D6/7",8,104,-1},
94  {6,"JP6_TP13D6/8",10,67,75},
95  {6,"JP6_TP14D6/9",8,112,-1},
96 
97  /*:::::::::: J E T.....P A T C H......O N E .........*/
98  /*......... DSM0 board 7 .... */
99  {1,"JP1_TP1D7/0",10,3,11},
100  {1,"JP1_TP2D7/1",8,80,-1},
101  {1,"JP1_TP4D7/2",10,19,27},
102  {1,"JP1_TP5D7/3",8,88,-1},
103  {1,"JP1_TP7D7/4",10,35,43},
104  {1,"JP1_TP8D7/5",8,96,-1},
105  {1,"JP1_TP10D7/6",10,51,59},
106  {1,"JP1_TP11D7/7",8,104,-1},
107  {1,"JP1_TP13D7/8",10,67,75},
108  {1,"JP1_TP14D7/9",8,112,-1},
109 
110  /*......... DSM0 board 8 */
111  {1,"JP1_TP3D8/0",6,0,8},
112  {1,"JP1_TP6D8/1",6,16,24},
113  {1,"JP1_TP9D8/2",6,32,40},
114  {1,"JP1_TP12D8/3",6,48,56},
115  {1,"JP1_TP15D8/4",6,64,72},
116 
117  /*:::::::::: J E T.....P A T C H......T W O .........*/
118 
119  {2,"JP2_TP3D8/5",6,0,8},
120  {2,"JP2_TP6D8/6",6,16,24},
121  {2,"JP2_TP9D8/7",6,32,40},
122  {2,"JP2_TP12D8/8",6,48,56},
123  {2,"JP2_TP15D8/9",6,64,72},
124 
125  /*......... DSM0 board 9 ..... */
126  {2,"JP2_TP1D9/0",10,3,11},
127  {2,"JP2_TP2D9/1",8,80,-1},
128  {2,"JP2_TP4D9/2",10,19,27},
129  {2,"JP2_TP5D9/3",8,88,-1},
130  {2,"JP2_TP7D9/4",10,35,43},
131  {2,"JP2_TP8D9/5",8,96,-1},
132  {2,"JP2_TP10D9/6",10,51,59},
133  {2,"JP2_TP11D9/7",8,104,-1},
134  {2,"JP2_TP13D9/8",10,67,75},
135  {2,"JP2_TP14D9/9",8,112,-1},
136 
137 };
138 
139 #endif
140 
141 #ifdef EEmapTP_USE
142 
143 
144 //===========================================================
145 
146 // hardocded map of TP for EEMC DSM-0
147 
148 #define EEnTPeta 3 // numbers TP patches in eta (from center)
149 #define EEnTPphi 30 // numbers TP patches in phi (clock wise)
150 
151 struct EEmapTP {
152  int JPid, TPid; // Jet Patch ID [1-6] & Trig Patch ID [1-15] according to Steve's numbering scheme
153  int brdIn,chIn; //DSM level-0 input board [1-9] & channel number 0-9]
154  int chOut; // DSM level-0 output channel [0-11]
155 };
156 //
157 
158 static EEmapTP eeMapTP[EEnTPphi][EEnTPeta] ={
159  { {1, 1, 7, 0, 8}, {1, 2, 7, 1, 8}, {1, 3, 8, 0, 9} },
160  { {1, 4, 7, 2, 8}, {1, 5, 7, 3, 8}, {1, 6, 8, 1, 9} },
161  { {1, 7, 7, 4, 8}, {1, 8, 7, 5, 8}, {1, 9, 8, 2, 9} },
162  { {1,10, 7, 6, 8}, {1,11, 7, 7, 8}, {1,12, 8, 3, 9} },
163  { {1,13, 7, 8, 8}, {1,14, 7, 9, 8}, {1,15, 8, 4, 9} },
164  { {2, 1, 9, 0,11}, {2, 2, 9, 1,11}, {2, 3, 8, 5,10} },
165  { {2, 4, 9, 2,11}, {2, 5, 9, 3,11}, {2, 6, 8, 6,10} },
166  { {2, 7, 9, 4,11}, {2, 8, 9, 5,11}, {2, 9, 8, 7,10} },
167  { {2,10, 9, 6,11}, {2,11, 9, 7,11}, {2,12, 8, 8,10} },
168  { {2,13, 9, 8,11}, {2,14, 9, 9,11}, {2,15, 8, 9,10} },
169  { {3, 1, 1, 0, 0}, {3, 2, 1, 1, 0}, {3, 3, 2, 0, 1} },
170  { {3, 4, 1, 2, 0}, {3, 5, 1, 3, 0}, {3, 6, 2, 1, 1} },
171  { {3, 7, 1, 4, 0}, {3, 8, 1, 5, 0}, {3, 9, 2, 2, 1} },
172  { {3,10, 1, 6, 0}, {3,11, 1, 7, 0}, {3,12, 2, 3, 1} },
173  { {3,13, 1, 8, 0}, {3,14, 1, 9, 0}, {3,15, 2, 4, 1} },
174  { {4, 1, 3, 0, 3}, {4, 2, 3, 1, 3}, {4, 3, 2, 5, 2} },
175  { {4, 4, 3, 2, 3}, {4, 5, 3, 3, 3}, {4, 6, 2, 6, 2} },
176  { {4, 7, 3, 4, 3}, {4, 8, 3, 5, 3}, {4, 9, 2, 7, 2} },
177  { {4,10, 3, 6, 3}, {4,11, 3, 7, 3}, {4,12, 2, 8, 2} },
178  { {4,13, 3, 8, 3}, {4,14, 3, 9, 3}, {4,15, 2, 9, 2} },
179  { {5, 1, 4, 0, 4}, {5, 2, 4, 1, 4}, {5, 3, 5, 0, 5} },
180  { {5, 4, 4, 2, 4}, {5, 5, 4, 3, 4}, {5, 6, 5, 1, 5} },
181  { {5, 7, 4, 4, 4}, {5, 8, 4, 5, 4}, {5, 9, 5, 2, 5} },
182  { {5,10, 4, 6, 4}, {5,11, 4, 7, 4}, {5,12, 5, 3, 5} },
183  { {5,13, 4, 8, 4}, {5,14, 4, 9, 4}, {5,15, 5, 4, 5} },
184  { {6, 1, 6, 0, 7}, {6, 2, 6, 1, 7}, {6, 3, 5, 5, 6} },
185  { {6, 4, 6, 2, 7}, {6, 5, 6, 3, 7}, {6, 6, 5, 6, 6} },
186  { {6, 7, 6, 4, 7}, {6, 8, 6, 5, 7}, {6, 9, 5, 7, 6} },
187  { {6,10, 6, 6, 7}, {6,11, 6, 7, 7}, {6,12, 5, 8, 6} },
188  { {6,13, 6, 8, 7}, {6,14, 6, 9, 7}, {6,15, 5, 9, 6} }
189 };
190 
191 #endif
192 
193 /*
194 
195 The .h file tells you how to find relation between
196 Steve's TP id and DSM input.
197 
198 brdIn,chIn - refer to level 0 inputs
199 chOut - is level 1 input (i.e. level 0 output)
200 
201 The tricky part is to find relation between tower ID and
202 one of elements in this array.
203 An 'lement'is this 5 numbers: {1, 2, 7, 1, 8}
204 
205 As you see eeMapTP[EEnTPphi=i][EEnTPeta=j] forms a 2D array describing topology of 90 EEMC TP .
206 
207 EEnTPeta numbers TP from inside,
208 tower eta bins 1-3 -->j=0, 4-7 -->j=1, 8-12 -->j=2;
209 
210 EEnTPphi numbers 30 TP in phi . 60/2=30 - makes sense.
211 I forgot where is the zero, I think it should be for the first TP in JP1.
212 then you go clokwise.
213 
214 The firts element eeMapTP[0][0]= {1, 1, 7, 0, 8} corresponds to towers:
215 11TD01 11TE01
216 11TD02 11TE02
217 11TD03 11TE03
218 
219 (Assuming JP=1 covers 11TD -1TC - I do not remeber)
220 
221 Next element in eta direction eeMapTP[1][0]= {1, 2, 7, 1, 8} covers
222 11TD04 11TE04
223 11TD05 11TE05
224 11TD06 11TE06
225 11TD07 11TE07
226 
227 Next elemnt in phi direction , clockwise eeMapTP[0][1]= {1, 4, 7, 2, 8}
228 12TA01 12TB01
229 12TA02 12TB02
230 12TA03 12TB03
231 
232 etc.
233 */
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