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StBemcTriggerSimu.cxx
1 #include "BEMC_DSM_decoder.h"
2 #include "StBemcTriggerSimu.h"
3 
4 //General
5 #include "TList.h"
6 #include "TH2.h"
7 #include "StMessMgr.h"
8 #include "StTriggerSimuMaker.h"
9 
10 //Bemc
11 #include "StEmcUtil/database/StEmcDecoder.h"
12 #include "StEmcUtil/geometry/StEmcGeom.h"
13 #include "StEmcUtil/database/StBemcTables.h"
14 #include "StEmcRawMaker/defines.h"
15 #include "StEmcSimulatorMaker/StEmcSimulatorMaker.h"
16 #include "StEmcADCtoEMaker/StEmcADCtoEMaker.h"
17 #include "StEmcRawMaker/StEmcRawMaker.h"
18 #include "StBemcTriggerDbThresholds.h"
19 
20 //StEvent
21 #include "St_DataSetIter.h"
22 #include "StEvent/StEventTypes.h"
23 
24 //Db
25 #include "St_db_Maker/St_db_Maker.h"
26 
27 // MuDst
28 #include "StMuDSTMaker/COMMON/StMuTypes.hh"
29 
30 // DSM 2009 Utilities
31 #include "StTriggerUtilities/StDSMUtilities/StDSM2009Utilities.hh"
32 
33 ClassImp(StBemcTriggerSimu)
34 //==================================================
35 //==================================================
36 StBemcTriggerSimu::StBemcTriggerSimu()
37 {
38  mEvent = NULL;
39  mDecoder = new StEmcDecoder();
40  mDbThres = new StBemcTriggerDbThresholds();
41  mGeo = StEmcGeom::getEmcGeom("bemc");
42  mAdc2e = 0;
43  starDb = NULL;
44  mTables = NULL;
45  mHList = NULL;
46  mConfig = 0;
47  mTestMode = false;
48 }
49 //==================================================
50 //==================================================
51 StBemcTriggerSimu::~StBemcTriggerSimu(){
52 
53  delete mDecoder;
54  delete mDbThres;
55 
56 }
57 //==================================================
58 //==================================================
59 void StBemcTriggerSimu::Init(){
60 
61  LOG_INFO <<Form("Bemc::Init() MC_flag=%d, config: flag=%d",mMCflag, mConfig)<<endm;
62  assert(mConfig>=kOnline);
63  assert(mConfig<=kExpert);
64 
65 
66  starDb = static_cast<St_db_Maker*> ( mHeadMaker->GetMakerInheritsFrom("St_db_Maker") );
67  if(!starDb) {
68  LOG_WARN << "StBemcTriggerSimu couldn't get a pointer to St_db_maker -- this means trouble" << endm;
69  }
70 
71  if(mMCflag == 1) {
72  StEmcSimulatorMaker *emcSim = static_cast<StEmcSimulatorMaker*> ( mHeadMaker->GetMakerInheritsFrom("StEmcSimulatorMaker") );
73  if(!emcSim) {
74  LOG_FATAL << "StBemcTriggerSimu couldn't find StEmcSimulatorMaker in chain" << endm;
75  assert(0);
76  }
77  mTables = emcSim->getTables();
78  }
79  else {
80  mAdc2e = static_cast<StEmcADCtoEMaker*> ( mHeadMaker->GetMakerInheritsFrom("StEmcADCtoEMaker") );
81  StEmcRawMaker *emcRaw = static_cast<StEmcRawMaker*> ( mHeadMaker->GetMakerInheritsFrom("StEmcRawMaker") );
82  if(mAdc2e) mTables = mAdc2e->getBemcData()->getTables();
83  else if(emcRaw) mTables = emcRaw->getBemcRaw()->getTables();
84  else {
85  LOG_FATAL << "StBemcTriggerSimu couldn't find StEmcADCtoEMaker and StEmcRawMaker in chain" << endm;
86  assert(0);
87  }
88  }
89 
90  mDbThres->LoadTimeStamps();
91 
92  //2005
93  mAllTriggers.insert(96201); //bemc-ht1-mb
94  mAllTriggers.insert(96211); //bemc-ht2-mb
95  mAllTriggers.insert(96221); //bemc-jp1-mb
96  mAllTriggers.insert(96233); //bemc-jp2-mb-b
97 
98  //2006
99  mAllTriggers.insert(117201); //bemc-http-mb
100  mAllTriggers.insert(117211); //bemc-ht2-mb
101  mAllTriggers.insert(117212); //bemc-ht2-mb-emul
102  mAllTriggers.insert(127212); //bemc-ht2-mb-emul
103  mAllTriggers.insert(127213); //bemc-ht2-mb-emul
104  mAllTriggers.insert(137213); //bemc-ht2-mb-emul
105  mAllTriggers.insert(117221); //bemc-jp1-mb
106  mAllTriggers.insert(127221); //bemc-jp1-mb
107  mAllTriggers.insert(137221); //bemc-jp1-mb
108  mAllTriggers.insert(137222); //bemc-jp1-mb
109  mAllTriggers.insert(117501); //bemc-jp0-mb
110  mAllTriggers.insert(127501); //bemc-jp0-mb
111  mAllTriggers.insert(137501); //bemc-jp0-mb
112  mAllTriggers.insert(117571); //bemc-jp1
113  mAllTriggers.insert(127571); //bemc-jp1
114  mAllTriggers.insert(137571); //bemc-jp1
115  mAllTriggers.insert(117575); //bemc-jp0-etot
116  mAllTriggers.insert(127575); //bemc-jp0-etot
117  mAllTriggers.insert(137575); //bemc-jp0-etot
118  mAllTriggers.insert(117585); //bemc-jp2
119  mAllTriggers.insert(127585); //bemc-jp2
120  mAllTriggers.insert(137585); //bemc-jp2
121  mAllTriggers.insert(117601); //Upsilon
122  mAllTriggers.insert(117602); //Upsilon
123  mAllTriggers.insert(137602); //Upsilon
124  mAllTriggers.insert(137603); //Upsilon
125  mAllTriggers.insert(117611); //bemc-http-mb-l2gamma
126  mAllTriggers.insert(127611); //bemc-http-mb-l2gamma
127  mAllTriggers.insert(5); //bemc-http-mb-l2gamma
128  mAllTriggers.insert(137611); //bemc-http-mb-l2gamma
129  mAllTriggers.insert(117621); //bemc-jp0-etot-mb-l2jet
130  mAllTriggers.insert(117622); //bemc-jp0-etot-mb-l2jet
131  mAllTriggers.insert(127622); //bemc-jp0-etot-mb-l2jet
132  mAllTriggers.insert(137622); //bemc-jp0-etot-mb-l2jet
133  mAllTriggers.insert(117705); //jpsi-mb
134  mAllTriggers.insert(137705); //jpsi-mb
135  mAllTriggers.insert(117821); //bemc-http-mb-fast
136  mAllTriggers.insert(127821); //bemc-http-mb-fast
137  mAllTriggers.insert(137821); //bemc-http-mb-fast
138  mAllTriggers.insert(137822); //bemc-http-mb-fast
139  mAllTriggers.insert(147570); //bemc-jp0
140  mAllTriggers.insert(147585); //bemc-http
141  mAllTriggers.insert(147611); //bemc-http-mb-l2gamma
142  mAllTriggers.insert(147621); //bemc-jp0-mb-l2jet
143  mAllTriggers.insert(147705); //jpsi-mb
144 
145  //2007
146  mAllTriggers.insert(200211); //bht2-mb
147  mAllTriggers.insert(200212); //bht2-mb
148  mAllTriggers.insert(200220); //bht2-mb
149  mAllTriggers.insert(200221); //bht2-mb
150  mAllTriggers.insert(200222); //bht2-mb
151  mAllTriggers.insert(200213); //btag
152  mAllTriggers.insert(200214); //btag
153  mAllTriggers.insert(200585); //bht2
154  mAllTriggers.insert(200586); //bht2
155  mAllTriggers.insert(200601); //L2-upsilon
156  mAllTriggers.insert(200602); //L2-upsilon
157  mAllTriggers.insert(200620); //L2-gamma
158  mAllTriggers.insert(200621); //L2-gamma
159  //not implemented
160  mAllTriggers.insert(200400); //upc
161  mAllTriggers.insert(200401); //upc
162  mAllTriggers.insert(200402); //upc
163  mAllTriggers.insert(200410); //upc-jpsi
164  mAllTriggers.insert(200411); //upc-jpsi
165 
166 
167  //2008dAu
168  mAllTriggers.insert(210500);//BEMC-HT0
169  mAllTriggers.insert(210510);//BEMC-HT1
170  mAllTriggers.insert(210520);//BEMC-HT2
171  mAllTriggers.insert(210501);//BEMC-HT0
172  mAllTriggers.insert(210511);//BEMC-HT1
173  mAllTriggers.insert(210521);//BEMC-HT2
174  mAllTriggers.insert(210541);//BEMC-HT4
175  //not implemented
176  mAllTriggers.insert(210601);//upsilon
177  mAllTriggers.insert(210710);//UPCjpsi
178  mAllTriggers.insert(210800);//BEMC-HT4-fast
179 
180  //2008pp
181  mAllTriggers.insert(220500);//BEMC-HT0-mb
182  mAllTriggers.insert(220510);//BEMC-HT1-mb
183  mAllTriggers.insert(220520);//BEMC-HT2-mb-slow
184 
185  //2009pp
186  //
187  // All the registers are now retrieved from the database in StTriggerSimuMaker.cxx
188  // (look for the function get2009DsmRegistersFromOnlineDatabase).
189  // This way, only one call to the database is made to get
190  // thresholds for bemc, eemc, and emc. The old way, each
191  // subdetector made a separate call to the database to
192  // get its thresholds via the noew-defunct function setDsmRegisters().
193  // This, of course, puts a lot of unecessary strain on the database.
194  // Hence, all the register retrievals are now done in one shot
195  // in StTriggerSimuMaker.cxx.
196  //
197  // The 2009 trigger IDs are handled by emc which has a TCU
198  // emulator. Basically, trigger definitions are retrieved
199  // from the database. Those definitions include which bits
200  // must be on at the output of the last DSM. Triggers are
201  // then satisfied accordingly.
202 
203  Clear();
204 
205 #ifdef DEBUG
206  mBEMCLayer0HT6bitDiff=new TH2F("BEMCLayer0HT6bitDiff","BEMC Layer 0 HT6bit Difference",kNPatches,0,kNPatches,128,-64,64);
207  mBEMCLayer0TP6bitDiff=new TH2F("BEMCLayer0TP6bitDiff","BEMC Layer 0 TP6bit Difference",kNPatches,0,kNPatches,128,-64,64);
208  mBEMCLayer0HT6bit=new TH2F("BEMCLayer0HT6bit","BEMC Layer 0 HT6bit",kNPatches,0,kNPatches,32,0,32);
209  mBEMCLayer0TP6bit=new TH2F("BEMCLayer0TP6bit","BEMC Layer 0 TP6bit",kNPatches,0,kNPatches,32,0,32);
210  mBEMCLayer1HTBits = new TH2F("BEMCLayer1HTBits","BEMC Layer1 HT Threshold Bits", 36, 0, 36, 10, 0, 10);
211  mBEMCLayer1HTBitsDiff = new TH2F("BEMCLayer1HTBitsDiff","BEMC Layer1 HT Threshold Bits - Simulated",36, 0, 36, 20, -10, 10);
212  mBEMCLayer1TPBits = new TH2F("BEMCLayer1TPBits","BEMC Layer1 TP Threshold Bits", 36, 0, 36, 10, 0, 10);
213  mBEMCLayer1TPBitsDiff = new TH2F("BEMCLayer1TPBitsDiff","BEMC Layer1 TP Threshold Bits - Simulated",36, 0, 36, 20, -10, 10);
214  mBEMCLayer1HTTPBits = new TH2F("BEMCLayer1HTTPBits","BEMC Layer1 HT.TP Threshold Bits", 36, 0, 36, 10, 0, 10);
215  mBEMCLayer1HTTPBitsDiff = new TH2F("BEMCLayer1HTTPBitsDiff","BEMC Layer1 HT.TP Threshold Bits - Simulated",36, 0, 36, 20, -10, 10);
216  mBEMCLayer1PatchSum = new TH2F("BEMCLayer1PatchSum", "BEMC Layer1 Patch Sum", 36, 0, 36, 100, 0, 100);
217  mBEMCLayer1PatchSumDiff = new TH2F("BEMCLayer1PatchSumDiff", "BEMC Layer1 Patch Sum Diff", 36, 0, 36, 200, -100, 100);
218  mBEMCLayer1HTmaskBits = new TH2F("BEMCLayer1HTmaskBits", "BEMC Layer1 HT Mask Bits", 36, 0, 36, 8, -4, 4);
219  mBEMCLayer1HTmaskDiff = new TH2F("BEMCLayer1HTmaskDiff", "BEMC Layer1 HT Mask Diff", 36, 0, 36, 8, -4, 4);
220  mBEMCLayer1HTthr3Bits = new TH2F("BEMCLayer1HTthr3Bits", "BEMC Layer1 HT Thr3 Bits", 36, 0, 36, 8, -4, 4);
221  mBEMCLayer1HTthr3Diff = new TH2F("BEMCLayer1HTthr3Diff", "BEMC Layer1 HT Thr3 Diff", 36, 0, 36, 8, -4, 4);
222  mBEMCLayer2PatchSum = new TH2F("BEMCLayer2PatchSum", "BEMC Layer2 Patch Sum", 6, 0, 6, 100, 0, 100);
223  mBEMCLayer2PatchSumDiff = new TH2F("BEMCLayer2PatchSumDiff", "BEMC Layer2 Patch Sum Diff", 6, 0, 6, 200, -100, 100);
224  mBEMCLayer2HT3Bits = new TH2F("BEMCLayer2HT3Bits", "BEMC Layer2 HT3 Bits", 6, 0, 6, 4, 0, 4);
225  mBEMCLayer2HT3BitsDiff = new TH2F("BEMCLayer2HT3BitsDiff", "BEMC Layer2 HT3 Bits", 6, 0, 6, 8, -4, 4);
226  mBEMCLayer2HTTPBits = new TH2F("BEMCLayer2HTTPBits", "BEMC Layer2 HTTP Bits", 6, 0, 6, 4, 0, 4);
227  mBEMCLayer2HTTPBitsDiff = new TH2F("BEMCLayer2HTTPBitsDiff", "BEMC Layer2 HTTP Bits", 6, 0, 6, 8, -4, 4);
228  mBEMCLayer2TPBits = new TH2F("BEMCLayer2TPBits", "BEMC Layer2 TP Bits", 6, 0, 6, 4, 0, 4);
229  mBEMCLayer2TPBitsDiff = new TH2F("BEMCLayer2TPBitsDiff", "BEMC Layer2 TP Bits", 6, 0, 6, 8, -4, 4);
230  mBEMCLayer2JPBits = new TH2F("BEMCLayer2JPBits", "BEMC Layer2 JP Bits", 6, 0, 6, 4, 0, 4);
231  mBEMCLayer2JPBitsDiff = new TH2F("BEMCLayer2JPBitsDiff", "BEMC Layer2 JP Bits", 6, 0, 6, 8, -4, 4);
232  mBEMCLayer2HTj0Bits = new TH2F("BEMCLayer2HTj0Bits", "BEMC Layer2 HT_j0 Bits", 6, 0, 6, 4, 0, 4);
233  mBEMCLayer2HTj0BitsDiff = new TH2F("BEMCLayer2HTj0BitsDiff", "BEMC Layer2 HT_j0 Patch Bits", 6, 0, 6, 8, -4, 4);
234  mBEMCLayer2HTj1Bits = new TH2F("BEMCLayer2HTj1Bits", "BEMC Layer2 HT_j1 Bits", 6, 0, 6, 4, 0, 4);
235  mBEMCLayer2HTj1BitsDiff = new TH2F("BEMCLayer2HTj1BitsDiff", "BEMC Layer2 HT_j1 Bits", 6, 0, 6, 8, -4, 4);
236 
237  mHList->Add(mBEMCLayer0HT6bit);
238  mHList->Add(mBEMCLayer0TP6bit);
239  mHList->Add(mBEMCLayer0HT6bitDiff);
240  mHList->Add(mBEMCLayer0TP6bitDiff);
241  mHList->Add(mBEMCLayer1HTBits);
242  mHList->Add(mBEMCLayer1HTBitsDiff);
243  mHList->Add(mBEMCLayer1TPBits);
244  mHList->Add(mBEMCLayer1TPBitsDiff);
245  mHList->Add(mBEMCLayer1HTTPBits);
246  mHList->Add(mBEMCLayer1HTTPBitsDiff);
247  mHList->Add(mBEMCLayer1PatchSum);
248  mHList->Add(mBEMCLayer2PatchSum);
249  mHList->Add(mBEMCLayer2HTTPBits);
250  mHList->Add(mBEMCLayer2TPBits);
251  mHList->Add(mBEMCLayer2HT3Bits);
252  mHList->Add(mBEMCLayer2JPBits);
253  mHList->Add(mBEMCLayer2HTj0Bits);
254  mHList->Add(mBEMCLayer2HTj1Bits);
255  mHList->Add(mBEMCLayer1PatchSumDiff);
256  mHList->Add(mBEMCLayer1HTthr3Bits);
257  mHList->Add(mBEMCLayer1HTthr3Diff);
258  mHList->Add(mBEMCLayer1HTmaskBits);
259  mHList->Add(mBEMCLayer1HTmaskDiff);
260  mHList->Add(mBEMCLayer2PatchSumDiff);
261  mHList->Add(mBEMCLayer2HTTPBitsDiff);
262  mHList->Add(mBEMCLayer2TPBitsDiff);
263  mHList->Add(mBEMCLayer2HT3BitsDiff);
264  mHList->Add(mBEMCLayer2JPBitsDiff);
265  mHList->Add(mBEMCLayer2HTj0BitsDiff);
266  mHList->Add(mBEMCLayer2HTj1BitsDiff);
267 
268 #endif
269 
270 }
271 //==================================================
272 //==================================================
273 void StBemcTriggerSimu::InitRun(int runnumber){
274  LOG_DEBUG<<"StBemcTriggerSimu::InitRun() -- " << runnumber << '\t' << mHeadMaker->GetDate() << '\t' << mHeadMaker->GetTime() << endm;
275 
276  assert(starDb);
277 
278  const TDatime& dbTime = starDb->GetDBTime();
279 
280  timestamp = dbTime.Get();
281  year = dbTime.GetYear();
282  yyyymmdd = dbTime.GetDate(); //form of 19971224 (i.e. 24/12/1997)
283  hhmmss = dbTime.GetTime(); //form of 123623 (i.e. 12:36:23)
284 
285  mDecoder->SetDateTime(dbTime);
286 
287  if (year < 2009) {
288  getTowerStatus();
289  getDSM_TPStatus();
290  getDSM_HTStatus();
291  getLUT();
292  getPed();
293 
294  //Get FEE window for HT from support class for offline operation
295  //online replaced this with Db call in getPed()
296  HT_FEE_Offset=mDbThres->GetHtFEEbitOffset(year);
297  }
298  else {
299  //Initialize DSM layers based on run number
300  //b001 and b101
301  if(year == 2009 || year == 2010 || year == 2011 || year == 2012 || year == 2014){
302  mB001 = new DSMLayer_B001_2009;
303  mB101 = new DSMLayer_B101_2009;
304  }else if(year==2013){
305  mB001 = new DSMLayer_B001_2009;
306  if(runnumber >= 14081067){
307  mB101 = new DSMLayer_B101_2013;
308  }else
309  mB101 = new DSMLayer_B101_2009;
310  }else if(year == 2015){
311  mB001 = new DSMLayer_B001_2015;
312  mB101 = new DSMLayer_B101_2015;
313  }else if(year == 2016){
314  mB001 = new DSMLayer_B001_2014_B;
315  mB101 = new DSMLayer_B101_2014_B;
316  }else if(year == 2017){
317  mB001 = new DSMLayer_B001_2015;
318  mB101 = new DSMLayer_B101_2015;
319  }else{
320  mB001 = new DSMLayer_B001_2009;
321  mB101 = new DSMLayer_B101_2009;
322  }
323 
324  if (mBemcStatus != "") {
325  FEEini2009();
326  }
327  else {
328  FEEini2009(runnumber);
329  }
330  mAllTriggers.clear();
331  }
332 }
333 //==================================================
334 //==================================================
335 void StBemcTriggerSimu::Clear(){
336 
337 
338  for (int did=1; did<=kNTowers; did++){
339  adc08[did-1]=0;
340  adc10[did-1]=0;
341  adc12[did-1]=0;
342  HT6bit_adc_holder[did-1]=0;
343  }
344 
345  for (int tpid=0;tpid<kNPatches; tpid++){
346  L0_HT_ADC[tpid]=0;
347  L0_TP_ADC[tpid]=0;
348  L0_TP_PED[tpid]=0;
349  HTadc06[tpid]=0;
350  TP6bit_adc_holder[tpid]=0;
351  }
352 
353  mFiredTriggers.clear();
354  mJpsiCandidates.clear();
355 }
356 //==================================================
357 //==================================================
358 bool StBemcTriggerSimu::isCorrupted() const {
359  return mMCflag != 1 && mAdc2e->isCorrupted();
360 }
361 //==================================================
362 //==================================================
363 StTriggerSimuDecision StBemcTriggerSimu::triggerDecision(int trigId) {
364  //first check if it fired
365  for(unsigned i=0; i<mFiredTriggers.size(); i++) {
366  if(trigId == mFiredTriggers[i]) return kYes;
367  }
368 
369  //now check if we care
370  if(mAllTriggers.find(trigId) == mAllTriggers.end()) {
371  return kDoNotCare;
372  }
373  else {
374  return kNo;
375  }
376 }
377 //==================================================
378 //==================================================
379 void StBemcTriggerSimu::getTowerStatus(){
380 
381  fill(TowerStatus,TowerStatus+kNTowers,1);
382  fill(numMaskTow,numMaskTow+kNPatches,0);
383 
384  if (mConfig==kOnline) {
385  for (Int_t cr=1; cr <= kNCrates; cr++){
386  for (Int_t ch=0; ch < kNChannels; ch++){
387  Int_t did,tpid;
388  mDecoder->GetTowerIdFromCrate(cr,ch,did);
389  TowerStatus[did-1]=mTables->triggerTowerStatus(cr,ch);
390  mDecoder->GetTriggerPatchFromTowerId(did,tpid);
391  if (TowerStatus[did-1]!=1) numMaskTow[tpid]++;
392  }
393  }
394  }
395 
396 
397  if (mConfig==kOffline){
398  for (int did=1; did<=kNTowers; did++){
399  Int_t tpid;
400  mTables->getStatus(BTOW, did, TowerStatus[did-1]);
401  if (mTables->status(BTOW,did,"calib")!=1) TowerStatus[did-1]=0;
402  mDecoder->GetTriggerPatchFromTowerId(did,tpid);
403  if (TowerStatus[did-1]!=1) numMaskTow[tpid]++;
404  }
405  }
406 
407  if (mConfig==kExpert){
408  for (int did=1; did<=kNTowers; did++){
409  Int_t tpid;
410  TowerStatus[did-1]=1;
411  mDecoder->GetTriggerPatchFromTowerId(did,tpid);
412  if (TowerStatus[did-1]!=1) numMaskTow[tpid]++;
413  }
414  }
415 }
416 //==================================================
417 //==================================================
418 void StBemcTriggerSimu::getDSM_TPStatus(){
419 
420  for (int tpid=0;tpid<kNPatches;tpid++) DSM_TPStatus[tpid]=1;
421 
422  //for online config TP status is set by DB
423  if (mConfig==kOnline){
424  for (int tpid=0;tpid<kNPatches;tpid++){
425  DSM_TPStatus[tpid]=mTables->triggerPatchStatus(tpid);
426  }
427  }
428 
429  //for offline config all TP status is good by definition.
430  if (mConfig==kOffline) {
431  for (int tpid=0;tpid<kNPatches;tpid++){
432  DSM_TPStatus[tpid]=1;
433  }
434  }
435 
436  //experts do as you will but set good by definition
437  if (mConfig==kExpert){
438  for (int tpid=0;tpid<kNPatches;tpid++){
439  DSM_TPStatus[tpid]=1;
440  }
441  }
442 
443 }
444 //==================================================
445 //==================================================
446 void StBemcTriggerSimu::getDSM_HTStatus(){
447 
448  for (int tpid=0;tpid<kNPatches;tpid++) DSM_HTStatus[tpid]=1;
449 
450  //Online get DSM HT status from db
451  if (mConfig==kOnline){
452  for (int tpid=0;tpid<kNPatches;tpid++){
453  DSM_HTStatus[tpid]=mTables->triggerHighTowerStatus(tpid);
454  }
455  }
456 
457  //Offline all DSM HT status are good
458  if (mConfig==kOffline){
459  for (int tpid=0; tpid<kNPatches; tpid++){
460  DSM_HTStatus[tpid]=1;
461  }
462  }
463 
464  if (mConfig==kExpert){
465  for (int tpid=0;tpid<kNPatches;tpid++){
466  DSM_HTStatus[tpid]=1;
467  }
468  }
469 }
470 //==================================================
471 //==================================================
472 void StBemcTriggerSimu::getPed() {
473 
474  for (int i=1;i<=kNTowers;i++) {ped12[i-1]=0;}
475 
476  for (int did=1;did<=kNTowers;did++){
477  bitConvValue[did-1]=mTables->triggerBitConversionByID(did);
478  }
479 
480  //get Target Pedestal value from DB
481  pedTargetValue=mTables->triggerPedestalShift();
482 
483  //online 12 bit peds stored as Float_t
484  if (mConfig==kOnline){
485  for (int cr=1; cr <= kNCrates; cr++){
486  for (int ch=0; ch < kNChannels; ch++){
487  int did;
488  mDecoder->GetTowerIdFromCrate(cr,ch,did);
489  ped12[did-1] = mTables->triggerPedestal(cr,ch);
490  }
491  }
492  }
493 
494  //offline 12 bit peds stored as Float_t
495  if (mConfig==kOffline){
496  for (int did=1; did<=kNTowers; did++){
497  ped12[did-1]=mTables->pedestal(BTOW,did);
498  }
499  }
500 
501  //Experts set ped to your favorite values
502  if (mConfig==kExpert){
503  for (int did=1; did<=kNTowers; did++){
504  ped12[did-1]=24;
505  }
506  }
507 }
508 //==================================================
509 //==================================================
510 void StBemcTriggerSimu::getLUT(){
511 
512  /*formula param
513  Is the trigger mask used for LUT calculation (to account for masked towers in TP)
514  0 = no, the LUT does not depend on which towers in a patch are masked out
515  1 = yes, the trigger mask is used for LUT scale modification
516  2 = yes, the trigger mask is used for LUT pedestal modification
517 LUTUseMask 2
518  */
519 
520  Int_t f,param[6];
521  for (int cr=1;cr<=kNCrates;cr++){
522  for (int seq=0; seq<kNSeq; seq++){
523  mTables->getTriggerFormulaTag(cr,seq,f);
524  mTables->getTriggerFormulaParameters(cr,seq,param);
525  formula[cr-1][seq]=f;
526  LUTscale[cr-1][seq]=param[0];
527  LUTped[cr-1][seq]=param[1];
528  LUTsig[cr-1][seq]=param[2];
529  LUTpow[cr-1][seq]=param[3];
530  }
531  }
532 }
533 //==================================================
534 //==================================================
535 void StBemcTriggerSimu::Make(){
536 
537  mEvent = static_cast<StEvent*> ( mHeadMaker->GetDataSet("StEvent") );
538 
539  //add test mode by zchang
540  if(!mMCflag && mTestMode){
541  StEmcTriggerDetector emc = StMuDst::event()->emcTriggerDetector();
542  for(int ip = 0; ip < 300; ip++){
543  int ht = emc.highTower(ip);
544  int pa = emc.patch(ip);
545  L0_TP_ADC[ip] = pa;
546  L0_HT_ADC[ip] = ht;
547  }
548  }else{
549  if (year < 2009)
550  FEEout();
551  else {
552  FEEout2009();
553  simulateFEEfailure();
554  }
555  }
556 
557  //pp
558  if (year==2006){
559  get2006_DSMLayer0();
560  get2006_DSMLayer1();
561  get2006_DSMLayer2();
562  }
563 
564  //AuAu
565  if ((year==2007)&&(yyyymmdd<20071205)){
566  get2007_DSMLayer0();
567  get2007_DSMLayer1();
568  get2007_DSMLayer2();
569  }
570 
571  //dAu
572  if ((yyyymmdd>20071205)&&(yyyymmdd<20080129)){
573  get2008dAu_DSMLayer0();
574  get2008dAu_DSMLayer1();
575  get2008dAu_DSMLayer2();
576  }
577 
578  //pp
579  if ((year==2008)&&(yyyymmdd>20080129)){
580  get2008pp_DSMLayer0();
581  get2008pp_DSMLayer1();
582  get2008pp_DSMLayer2();
583  }
584 
585  //pp
586  if ((year>=2009)&&(yyyymmdd>20090101)) {
587  get2009_DSMLayer0();
588  get2009_DSMLayer1();
589  }
590 
591  if (mMCflag) fillStEmcTriggerDetector();
592 }
593 //==================================================
594 //==================================================
595 void StBemcTriggerSimu::FEEout() {
596  //many parts copied directly from Oleksandr's BEMC_DSM_decoder.cxx
597  //which is a C++ translation of the FEE code
598  //ped1 == ped12Diff value2 == ped10Diff value1 == ped10DiffI
599 
600 
601  // static int commonLUT[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
602  static int commonLUT[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, 4, 5, 6, 7, 8, 9,
603  10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
604  35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
605  60, 61, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62,
606  62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62,
607  62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62, 62};
608 
609  if(!mEvent) {LOG_WARN << "StBemcTriggerSimu -- no StEvent!" << endm;}
610 
611  StEmcCollection *emc = (mEvent ? mEvent->emcCollection() : 0);
612  if(!emc) {LOG_WARN << "StBemcTriggerSimu -- no StEmcCollection!" << endm;}
613 
614  StEmcDetector* detector=emc->detector(kBarrelEmcTowerId);
615  if(!detector) {LOG_WARN << "StBemcTriggerSimu -- no StEmcDetector!" << endm;}
616 
617  //loop through BEMC hits
618  //Store 8,10,12 bit pedestal adjusted ADC for hits
619  //for online case online tower masks are applied
620  //for offline case offline tower masks are applied
621  //DSM TP/HT masks are applied for online case
622  //DSM TP/HT masks are perfect for offline case
623  if(detector) {
624  for(Int_t m = 1; m <= 120; ++m) {
625  StEmcModule* module = detector->module(m);
626  if(module) {
627  StSPtrVecEmcRawHit& rawHit=module->hits();
628  for(UInt_t k = 0; k < rawHit.size(); ++k) {
629  if(rawHit[k]) {
630  int did, tpid;
631 
632  Int_t m=rawHit[k]->module();
633  Int_t e=rawHit[k]->eta();
634  Int_t s=abs(rawHit[k]->sub());
635  Int_t adc=rawHit[k]->adc();
636  //Float_t energy=rawHit[k]->energy();
637 
638  //Get software tower id and trigger patch id
639  mGeo->getId(m,e,s,did);
640  mDecoder->GetTriggerPatchFromTowerId(did,tpid);
641 
642  //apply tower masks
643  if (TowerStatus[did-1]==1) {
644 
645  //need to shift ADC and ped to pedTargetValue
646  //goal is to ultimately place DSM channel at 1
647  ped12Diff=ped12[did-1]-pedTargetValue;
648 
649  //12 bit ADC enters FEE and drop 2 bits immediately
650  adc12[did-1]=adc;
651  adc10[did-1]=adc12[did-1] >> 2;
652 
653  //determine if pedestal is > or < pedTargetValue
654  int operation=1;
655  if(ped12Diff < 0) {
656  ped12Diff = -ped12Diff;
657  operation = 0;
658  }
659  ped10Diff = ped12Diff/4;
660 
661  //Rounds ped10Diff up/down to an Int_t
662  sprintf(buffer,"%3.0f",ped10Diff);
663  ped10DiffI=atoi(buffer);
664 
665  //effective rounding up for binary numbers with 1xx,10xx,11xx,100xx,101xx,110xx,111xx etc
666  //so that carrying out ADC12 - PED12 + 24 in 12 bit land is the same exercise as in 10 bit land
667  if (ped12Diff - ped10DiffI*4 > 2) {
668  ped10Diff+=1;
669  sprintf(buffer,"%3.0f",ped10Diff);
670  ped10DiffI=atoi(buffer);
671  }
672 
673  // can't subtract/add more than 15 on 10-bit level
674  if(ped10DiffI > 15) {
675  sprintf(buffer,"%3.0f",double(ped10DiffI - 11)/4);
676  int holder = atoi(buffer);
677  ped10Diff = ped10DiffI - 4*holder;
678  sprintf(buffer,"%3.0f",ped10Diff);
679  ped10DiffI = atoi(buffer);
680  }
681 
682  //adjust pedestal of tower adc to 24(6) in 12(10) bit
683  if (operation==1) adc10[did-1] -= ped10DiffI;
684  if (operation==0) adc10[did-1] += ped10DiffI;
685  // if in offline mode and pedestal is not matched well to adc spectrum so
686  // adc -ped < 0 then set adc = 0 so it cannot cause a trigger.
687  if ((mConfig==kOffline)&&(adc10[did-1] < 0)) adc10[did-1]=0;
688 
689  //now adc10 and adc08 are the 10 and 8 bit pedestal shift adcs
690  adc08[did-1]=adc10[did-1] >> 2;
691 
692  //subject all towers to HT algorithm and transform adc10 into adc06
693  int HTholder=-1;
694 
695  if (mConfig==kOnline) HTholder = adc10[did-1] >> bitConvValue[did-1];//drop lowest bits
696  if (mConfig==kOffline) HTholder = adc10[did-1] >> HT_FEE_Offset;//drop lowest bits
697 
698  int HTL = HTholder & 0x1F;// AND HTholder with 00011111 to grab 5 lowest bits
699  int HTH = HTholder >> 5;//Remove lowest 5 bits
700  int B5 = 0;
701  if(HTH>0) B5 = 1;
702  HTadc06[did-1] = HTL+(B5<<5);
703 
704  //Fill DSM L0 with 6bit HT/TP in each TP
705  HT6bit_adc_holder[did-1]=HTadc06[did-1];
706  if (DSM_HTStatus[tpid]==1){
707  if (HTadc06[did-1]>L0_HT_ADC[tpid]) L0_HT_ADC[tpid]=HTadc06[did-1];
708  }
709  if (DSM_TPStatus[tpid]==1) {
710  L0_TP_ADC[tpid]+=adc08[did-1];
711  TP6bit_adc_holder[tpid]+=adc08[did-1];
712  //Calculate LUT ped for OFFLINE
713  L0_TP_PED[tpid]++;
714  }
715 
716  //Mask out 6 bit adc if that DSM HT/TP bit was masked out
717  if (DSM_HTStatus[tpid]==0) L0_HT_ADC[tpid]=0;
718  if (DSM_TPStatus[tpid]==0) L0_TP_ADC[tpid]=0;
719  if (DSM_TPStatus[tpid]==0) TP6bit_adc_holder[tpid]=0;
720 
721  if (0)
722  {
723  cout<<"Tow#="<<did<<" TP#="<<tpid<<" adc12="<<adc12[did-1]<<" adc10="<<adc10[did-1]<<" adc08="<<adc08[did-1]
724  <<" HTadc06="<<HTadc06[did-1]<<" ped12="<<ped12[did-1]<<" ped12diff="<<ped12Diff<<" ped10Diff="
725  <<ped10Diff<<"HTholder="<<HTholder<<" HTL="<<HTL<<" HTH="<<HTH<<" B5="<<B5<<" BitConverValue="<<bitConvValue[did-1]
726  <<" HT_FEE_Offset="<<HT_FEE_Offset<<" L0_TP_ADC="<<L0_TP_ADC[tpid]<<" PedTargetValue="<<pedTargetValue<<endl;
727  }
728  }
729  }
730  }
731  }
732  }
733  }
734 
735  //Find LUT
736  for (int tpid=0;tpid<kNPatches;tpid++){
737 
738 
739  Int_t cr, seq, chan, LUTindex;
740  mDecoder->GetCrateAndSequenceFromTriggerPatch(tpid,cr,seq);
741  chan=seq/16;
742 
743  if (mConfig==kOnline)
744  {
745 
746  if ( ((L0_TP_ADC[tpid]+LUTped[cr-1][chan]+2)>=0) && (formula[cr-1][chan]==2) && (LUTscale[cr-1][chan]==1) &&
747  (LUTpow[cr-1][chan]!=0) && (LUTsig[cr-1][chan]==0) && (pedTargetValue==24))
748  {
749  LUTindex=L0_TP_ADC[tpid] + LUTped[cr-1][chan] + numMaskTow[tpid];
750  LUT[tpid] = commonLUT[LUTindex];
751  }
752  else
753  {
754  /* cout<<"Someting NOT right with LUT!"<<
755  " LUTped="<<LUTped[cr-1][chan]+2<<" formula="<<formula[cr-1][chan]<<
756  " LUTscale="<<LUTscale[cr-1][chan]<<" LUTpow="<<LUTpow[cr-1][chan]<<
757  " LUTsig="<<LUTsig[cr-1][chan]<<" pedTargetValue="<<pedTargetValue<<endl;
758  assert(1);
759  */
760  }
761  L0_TP_ADC[tpid]=LUT[tpid];
762  TP6bit_adc_holder[tpid]=LUT[tpid];
763  }
764 
765 
766  if (mConfig==kOffline) {
767  // MOCK up LUT table for Offline case
768  if ((L0_TP_PED[tpid]-1)>=L0_TP_ADC[tpid]) {
769  L0_TP_ADC[tpid]=1;
770  TP6bit_adc_holder[tpid]=1;
771  }
772  if ((L0_TP_PED[tpid]-1)< L0_TP_ADC[tpid]) {
773  L0_TP_ADC[tpid]-=(L0_TP_PED[tpid]-1);
774  TP6bit_adc_holder[tpid]-=(L0_TP_PED[tpid]-1);
775  }
776  if (L0_TP_ADC[tpid] > 62) {
777  L0_TP_ADC[tpid]=62;
778  TP6bit_adc_holder[tpid]=62;
779  }
780  }
781 
782 
783  if (0)
784  {
785  cout<<" tpid="<<tpid<<" cr="<<cr<<" ch="<<chan<<" formula="<<formula[cr-1][chan]<<
786  " TPadc="<<L0_TP_ADC[tpid]<<" OfflinePed="<<L0_TP_PED[tpid]<<" LUTped="<<LUTped[cr-1][chan]<<
787  " numMaskTow="<<numMaskTow[tpid]<<" LUTindex="<<LUTindex<<" OnlineLUT="<<LUT[tpid]<<
788  " diff="<<(L0_TP_ADC[tpid] - (L0_TP_PED[tpid]-1)) - (LUT[tpid])<<endl;
789  }
790  }
791 
792  // LOG_DEBUG messages
793  LOG_DEBUG << "BEMC trigger patch format is HT/TPsum" << endm;
794  for (int dsm = 0; dsm < 30; ++dsm) {
795  TString line = Form("TP%d-%d: ",dsm*10,dsm*10+9);
796  for (int ch = 0; ch < 10; ++ch) {
797  int triggerPatch = dsm*10+ch;
798  line += Form("%d/%d ",L0_HT_ADC[triggerPatch],L0_TP_ADC[triggerPatch]);
799  }
800  LOG_DEBUG << line << endm;
801  }
802 }
803 
804 void StBemcTriggerSimu::GetTriggerPatchFromCrate(int crate, int seq, int& triggerPatch) const
805 {
806  triggerPatch = (340-10*crate)%150+seq;
807  if (crate <= 15) triggerPatch += 150;
808 }
809 
810 void StBemcTriggerSimu::FEEini2009()
811 {
812  const bool debug = false;
813 
814  fill(numMaskTow,numMaskTow+kNPatches,0);
815 
816  ifstream bemcStatus(mBemcStatus);
817 
818  assert(bemcStatus);
819 
820  LOG_INFO << mBemcStatus << endm;
821 
822  TString line;
823 
824  while (line.ReadLine(bemcStatus)) {
825  if (line.BeginsWith("#")) {
826  LOG_INFO << line << endm;
827  continue;
828  }
829  else if (line.BeginsWith("SoftId")) {
830  int towerId, crate, crateSeq, towerStatus, highTowerStatus, patchSumStatus, triggerPatch;
831  float pedestal;
832  sscanf(line,"SoftId %d %d %d %d %d %d %f %d",&towerId,&crate,&crateSeq,&towerStatus,&highTowerStatus,&patchSumStatus,&pedestal,&triggerPatch);
833  LOG_INFO << "SoftId " << towerId << '\t' << crate << '\t' << crateSeq << '\t' << towerStatus << '\t' << highTowerStatus << '\t' << patchSumStatus << '\t' << pedestal << '\t' << triggerPatch << endm;
834  TriggerPatchFromTowerId[towerId-1] = triggerPatch;
835  TowerStatus[towerId-1] = towerStatus;
836  ped12[towerId-1] = pedestal;
837  if (towerStatus == 0) ++numMaskTow[triggerPatch];
838  }
839  else if (line.BeginsWith("TriggerPedestalShift")) {
840  sscanf(line,"TriggerPedestalShift %lu",&pedTargetValue);
841  LOG_INFO << "TriggerPedestalShift " << pedTargetValue << endm;
842  }
843  else if (line.BeginsWith("triggerPatch")) {
844  int triggerPatch, crate, cratePatch, highTowerStatus, patchSumStatus, bitConvMode, LUTformula;
845  int p0, p1, p2, p3, p4, p5;
846  sscanf(line,"triggerPatch %d %d %d %d %d %d %d %d %d %d %d %d %d",&triggerPatch,&crate,&cratePatch,&highTowerStatus,&patchSumStatus,&bitConvMode,&LUTformula,&p0,&p1,&p2,&p3,&p4,&p5);
847  LOG_INFO << "triggerPatch " << triggerPatch << '\t' << crate << '\t' << cratePatch << '\t' << highTowerStatus << '\t' << patchSumStatus << '\t' << bitConvMode << '\t' << LUTformula << '\t' << p0 << '\t' << p1 << '\t' << p2 << '\t' << p3 << '\t' << p4 << '\t' << p5 << endm;
848  TriggerPatchFromCrate[crate-1][cratePatch] = triggerPatch;
849  DSM_HTStatus[triggerPatch] = highTowerStatus;
850  DSM_TPStatus[triggerPatch] = patchSumStatus;
851  bitConvValue[triggerPatch] = bitConvMode;
852  formula[crate-1][cratePatch] = LUTformula;
853  LUTscale[crate-1][cratePatch] = p0;
854  LUTped [crate-1][cratePatch] = p1;
855  LUTsig [crate-1][cratePatch] = p2;
856  LUTpow [crate-1][cratePatch] = p3;
857  }
858  }
859 
860  bemcStatus.close();
861 
862  for (int towerId = 1; towerId <= kNTowers; ++towerId) {
863  FEEped[towerId-1] = getFEEpedestal(ped12[towerId-1],pedTargetValue,debug);
864  }
865 }
866 
867 void StBemcTriggerSimu::FEEini2009(int runNumber)
868 {
869  const bool debug = false;
870 
871  mTables->getTriggerPedestalShift((int&)pedTargetValue);
872  LOG_INFO << "pedTargetValue\t" << pedTargetValue << endm;
873  fill(numMaskTow,numMaskTow+kNPatches,0);
874  LOG_INFO << "towerId\ttriggerPatch\tcrate\tseq\tstatus\tpedestal\tFEEpedestal\tgain" << endm;
875  for (int towerId = 1; towerId <= kNTowers; ++towerId) {
876  int crate, seq, status, triggerPatch;
877  float rms;
878  mDecoder->GetCrateFromTowerId(towerId,crate,seq);
879  mDecoder->GetTriggerPatchFromTowerId(towerId,triggerPatch);
880  TriggerPatchFromTowerId[towerId-1] = triggerPatch;
881  switch (mConfig) {
882  case kOnline:
883  mTables->getTriggerTowerStatus(crate,seq,status);
884  mTables->getTriggerPedestal(crate,seq,ped12[towerId-1]);
885  break;
886  case kOffline:
887  mTables->getStatus(BTOW,towerId,status);
888  mTables->getPedestal(BTOW,towerId,0,ped12[towerId-1],rms);
889  break;
890  default:
891  assert(mConfig == kOnline || mConfig == kOffline);
892  break;
893  } // switch mConfig
894 
895  TowerStatus[towerId-1] = status == 1 || status == 18;
896  // Mod by Danny
897  if(runNumber > 14000000 && runNumber < 15000000) TowerStatus[towerId-1] = status == 1;
898 
899  if (!TowerStatus[towerId-1]) ++numMaskTow[triggerPatch];
900  FEEped[towerId-1] = getFEEpedestal(ped12[towerId-1],pedTargetValue,debug);
901  mTables->getCalib(BTOW,towerId,1,TowerGain[towerId-1]);
902  LOG_INFO << Form("%d\t%d\t%d\t%d\t%d\t%.2f\t%d\t%.5f",towerId,triggerPatch,crate,seq,TowerStatus[towerId-1],ped12[towerId-1],FEEped[towerId-1],TowerGain[towerId-1]) << endm;
903  } // for towerId
904 
905  // These towers are swapped for Run 9
906  // and cross trigger patch boundaries:
907  // 4054 <---> 4014 (TP227 <---> TP236)
908  // 4055 <---> 4015 (TP227 <---> TP236)
909  // 4056 <---> 4016 (TP227 <---> TP236)
910  // 4057 <---> 4017 (TP229 <---> TP238)
911  swap(TriggerPatchFromTowerId[4054-1],TriggerPatchFromTowerId[4014-1]);
912  swap(TriggerPatchFromTowerId[4055-1],TriggerPatchFromTowerId[4015-1]);
913  swap(TriggerPatchFromTowerId[4056-1],TriggerPatchFromTowerId[4016-1]);
914  swap(TriggerPatchFromTowerId[4057-1],TriggerPatchFromTowerId[4017-1]);
915 
916  // Tower 1907 (TP13) has huge pedestal (2068.39) starting with run 10154060
917  // and time stamp 2009-06-03 20:38:58 GMT. Mask it off.
918  //if (timestamp >= TDatime("2009-06-03 20:38:58").Get()) TowerStatus[1907-1] = 0;
919  if (runNumber >= 10154060 && runNumber <= 10180034) TowerStatus[1907-1] = 0;
920 
921  // Tower 1233 has zero gain
922  if (runNumber >= 10141025 && runNumber <= 10155022) TowerStatus[1233-1] = 0;
923 
924  // Tower 4355 has huge pedestal (42949672.00). Mask it out.
925  if (runNumber >= 10136035 && runNumber <= 10136070) TowerStatus[4355-1] = 0;
926 
927  // Tower 1433 has zero gain in pp500
928  if (runNumber >= 10078075 && runNumber <= 10103042) TowerStatus[1433-1] = 0;
929 
930  //--zchang
931  LOG_INFO <<"LUT pedestal will be calculated by LUTped = LUTped (from database) + NumberOfMaskedOutTowers. --zchang"<<endm;
932  LOG_INFO <<"will set all trigger patch formula and bit conversion to 2 --zchang"<<endm;
933 
934  LOG_INFO << "triggerPatch\tcrate\tseq\tHTsta\tTPsta\tbitConv\tformula\tLUTscale\tLUTped\tLUTsig\tLUTpow\tpar4\tpar5\tnumMaskTow" << endm;
935  for (int crate = 1; crate <= kNCrates; ++crate) {
936  for (int seq = 0; seq < kNSeq; ++seq) {
937  int triggerPatch;
938  GetTriggerPatchFromCrate(crate,seq,triggerPatch);
939  TriggerPatchFromCrate[crate-1][seq] = triggerPatch;
940  mTables->getTriggerHighTowerStatus(triggerPatch,DSM_HTStatus[triggerPatch]);
941  mTables->getTriggerPatchStatus(triggerPatch,DSM_TPStatus[triggerPatch]);
942  mTables->getTriggerBitConv(crate,seq,(int&)bitConvValue[triggerPatch]);
943  mTables->getTriggerFormulaTag(crate,seq,formula[crate-1][seq]);
944 
945  int parameters[6];
946  mTables->getTriggerFormulaParameters(crate,seq,parameters);
947 
948  LUTscale[crate-1][seq] = parameters[0];
949  LUTped [crate-1][seq] = parameters[1];
950  LUTsig [crate-1][seq] = parameters[2];
951  LUTpow [crate-1][seq] = parameters[3];
952  //run12 modify trigger patch pedestal due to masked out towers --zchang
953  //if(runNumber > 13000000 && runNumber < 14000000){
954  //Mod by Danny
955  if(runNumber > 13000000 && runNumber < 15000000){
956  //test zchang set all trigger patch formula and bit conversion to 2 --zchang
957  bitConvValue[triggerPatch] = 2;
958  formula[crate-1][seq] = 2;
959  LUTped[crate-1][seq] += numMaskTow[triggerPatch];
960  }
961  //end --zchang
962  LOG_INFO << Form("%d\t%d\t%d\t%d\t%d\t%ld\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d",triggerPatch,crate,seq,DSM_HTStatus[triggerPatch],DSM_TPStatus[triggerPatch],bitConvValue[triggerPatch],formula[crate-1][seq],LUTscale[crate-1][seq],LUTped[crate-1][seq],LUTsig[crate-1][seq],LUTpow[crate-1][seq],parameters[4],parameters[5],numMaskTow[triggerPatch]) << endm;
963  } // for seq
964  } // for crate
965 
966  // Special cases:
967 
968  // TP90-99 don't let the BEMC configuration software overwrite their power-up default values
969  // with settings from the database. Furthermore, the bitConv bits for TP92-93 are flaky;
970  // most of the time bitConv=2, but sometimes bitConv=0.
971  fill(bitConvValue+90,bitConvValue+100,2);
972 
973  // TP277 TPsum output is always 0
974  DSM_TPStatus[277] = 0;
975 
976  // TP50-59 have wrong config for run 10128030 (Start 2009-05-08 08:52:14 GMT) to 10129011 (Stop 2009-05-09 07:38:42 GMT)
977  //if (TDatime("2009-05-08 08:52:14").Get() <= timestamp && timestamp <= TDatime("2009-05-09 07:38:42").Get()) {
978  if (runNumber >= 10128030 && runNumber <= 10129011) {
979  bitConvValue[50] = 2;
980  bitConvValue[51] = 2;
981  bitConvValue[52] = 3;
982  bitConvValue[53] = 3;
983  bitConvValue[54] = 2;
984  bitConvValue[55] = 2;
985  bitConvValue[56] = 2;
986  bitConvValue[57] = 2;
987  bitConvValue[58] = 3;
988  bitConvValue[59] = 3;
989  }
990 
991  // Copycat channels: The last 3 towers of the first trigger patch and all 16 towers of the second trigger patch
992  // have duplicate ADCs. A solution is to mask out both the high tower and patch sum output of the affected tower
993  // front end electronics (FEEs) in both the simulation and data for consistency. In addition, all 32 towers from
994  // both trigger patches (1 FEE board) should be masked out in the offline BEMC status tables.
995  // It is not clear what causes this problem but it seems to be a failure mode of either the tower crate multiplexer
996  // or the tower data collector (TDC). See the BEMC Technical Design Report, pp. 133-134:
997  // http://drupal.star.bnl.gov/STAR/system/files/BEMC%20TDR.pdf
998  // This problem has been identified in the BEMC data as far back as 2006 and as recently as 2011.
999  // See analysis:
1000  // http://cyclotron.tamu.edu/pibero/jets/2011.10.18/JetMeeting-2011.10.18.pdf
1001  if (runNumber >= 10120032 && runNumber <= 10121053) {
1002  DSM_HTStatus[228] = 0;
1003  DSM_TPStatus[228] = 0;
1004  DSM_HTStatus[229] = 0;
1005  DSM_TPStatus[229] = 0;
1006  }
1007 
1008  if (runNumber >= 10150051 && runNumber <= 10156058) {
1009  DSM_HTStatus[122] = 0;
1010  DSM_TPStatus[122] = 0;
1011  DSM_HTStatus[123] = 0;
1012  DSM_TPStatus[123] = 0;
1013  }
1014 
1015  if (runNumber >= 10156086 && runNumber <= 10160017) {
1016  DSM_HTStatus[22] = 0;
1017  DSM_TPStatus[22] = 0;
1018  DSM_HTStatus[23] = 0;
1019  DSM_TPStatus[23] = 0;
1020  }
1021 
1022  if (runNumber >= 10163048 && runNumber <= 10180034) {
1023  DSM_HTStatus[220] = 0;
1024  DSM_TPStatus[220] = 0;
1025  DSM_HTStatus[221] = 0;
1026  DSM_TPStatus[221] = 0;
1027  }
1028 }
1029 
1030 void StBemcTriggerSimu::FEEout2009()
1031 {
1032  const bool debug = false;
1033 
1034  StEmcCollection* emc = (mEvent ? mEvent->emcCollection() : 0);
1035  if (!emc) {
1036  LOG_WARN << "No StEmcCollection" << endm;
1037  return;
1038  }
1039 
1040  StEmcDetector* det = emc->detector(kBarrelEmcTowerId);
1041  if (!det) {
1042  LOG_WARN << "No StEmcDetector" << endm;
1043  return;
1044  }
1045 
1046  // FEE action
1047  int nhits = 0;
1048 
1049  for (size_t m = 1; m <= det->numberOfModules(); ++m) {
1050  const StSPtrVecEmcRawHit& hits = det->module(m)->hits();
1051  nhits += hits.size();
1052  for (size_t i = 0; i < hits.size(); ++i) {
1053  const StEmcRawHit* hit = hits[i];
1054  int towerId = hit->softId(BTOW);
1055  if (TowerStatus[towerId-1]) {
1056  int triggerPatch = TriggerPatchFromTowerId[towerId-1];
1057  int ht, pa;
1058  simulateFEEaction(hit->adc(),FEEped[towerId-1],bitConvValue[triggerPatch],ht,pa,debug);
1059  HT6bit_adc_holder[towerId-1] = ht;
1060  if (ht > L0_HT_ADC[triggerPatch]) L0_HT_ADC[triggerPatch] = ht;
1061  L0_TP_ADC[triggerPatch] += pa;
1062  } // if TowerStatus
1063  } // for i
1064  } // for m
1065 
1066  // Make sure BTOW has 4800 hits. Towers with no physics signal are just
1067  // set to pedestal. This is achieved in real data and embedding macros with:
1068  //
1069  // StEmcADCtoEMaker* bemcAdc = new StEmcADCtoEMaker;
1070  // bemcAdc->saveAllStEvent(true);
1071  //
1072  // and IN ADDITION simulation macros need:
1073  //
1074  // StEmcSimulatorMaker* emcSim = (StEmcSimulatorMaker*)chain->GetMaker("EmcSimulator");
1075  // emcSim->setCheckStatus(kBarrelEmcTowerId,false);
1076  // emcSim->setMakeFullDetector(kBarrelEmcTowerId,true);
1077  // emcSim->setDoZeroSuppression(kBarrelEmcTowerId,false);
1078  assert(nhits == kNTowers);
1079 
1080  // FEE LUT
1081  for (int crate = 1; crate <= kNCrates; ++crate) {
1082  for (int seq = 0; seq < kNSeq; ++seq) {
1083  int triggerPatch = TriggerPatchFromCrate[crate-1][seq];
1084  if (!DSM_HTStatus[triggerPatch]) L0_HT_ADC[triggerPatch] = 0;
1085  if (!DSM_TPStatus[triggerPatch]) L0_TP_ADC[triggerPatch] = 0;
1086  else {
1087  int lut;
1088  simulateFEELUT(L0_TP_ADC[triggerPatch],formula[crate-1][seq],LUTscale[crate-1][seq],LUTped[crate-1][seq],LUTsig[crate-1][seq],LUTpow[crate-1][seq],0,0,numMaskTow[triggerPatch],pedTargetValue,lut,debug);
1089  L0_TP_ADC[triggerPatch] = TP6bit_adc_holder[triggerPatch] = lut;
1090  }
1091  } // for seq
1092  } // for crate
1093 }
1094 
1095 void StBemcTriggerSimu::simulateFEEfailure()
1096 {
1097  switchon(L0_HT_ADC[166],1);
1098  switchon(L0_HT_ADC[199],0);
1099  switchoff(++L0_HT_ADC[277],0);
1100  switchoff(L0_HT_ADC[292],1);
1101 
1102  int runNumber = StMaker::GetChain()->GetRunNumber();
1103 
1104  if (runNumber >= 10169005 && runNumber <= 10180034) switchon(L0_HT_ADC[196],2);
1105  if (runNumber >= 10156086 && runNumber <= 10158021) switchoff(++L0_HT_ADC[288],0);
1106 
1107  if (runNumber >= 10131039 && runNumber <= 10139018) switchoff(L0_TP_ADC[239],0);
1108  if (runNumber >= 10160069 && runNumber <= 10162040) switchoff(L0_TP_ADC[161],1);
1109  if (runNumber >= 10121092 && runNumber <= 10136031) switchon (L0_TP_ADC[137],0);
1110  if (runNumber >= 10156031 && runNumber <= 10180034) switchon (L0_TP_ADC[137],0);
1111  if (runNumber >= 10154060 && runNumber <= 10155022) switchon (L0_TP_ADC[13 ],0);
1112  //lut to 1 for bad trigger patch 75 --zchang
1113  if(runNumber >= 13077001 && runNumber <= 14000000){
1114  L0_TP_ADC[75] = 1;
1115  LOG_INFO<<Form("patch 75 trigger patch output set to %d", L0_TP_ADC[75])<<endm;
1116  }
1117  //end -zchang
1118 }
1119 
1120 //==================================================
1121 //==================================================
1122 void StBemcTriggerSimu::get2006_DSMLayer0() {
1123 
1124  //0-(8)9 ADC sum Trigger Patches
1125  //10-11 HT threshold bits
1126  //12-13 TP threshold bits
1127  //14-15 HT&&TP threshold bits
1128 
1129  //SWITCH MISMATCHED tpid HERE for 2006
1130  int placeholder;
1131  placeholder=L0_HT_ADC[291];
1132  L0_HT_ADC[291]=L0_HT_ADC[294];
1133  L0_HT_ADC[294]=placeholder;
1134  placeholder=L0_HT_ADC[250];
1135  L0_HT_ADC[250]=L0_HT_ADC[251];
1136  L0_HT_ADC[251]=placeholder;
1137  placeholder=L0_HT_ADC[263];
1138  L0_HT_ADC[263]=L0_HT_ADC[267];
1139  L0_HT_ADC[267]=placeholder;
1140 
1141  placeholder=L0_TP_ADC[291];
1142  L0_TP_ADC[291]=L0_TP_ADC[294];
1143  L0_TP_ADC[294]=placeholder;
1144  placeholder=L0_TP_ADC[250];
1145  L0_TP_ADC[250]=L0_TP_ADC[251];
1146  L0_TP_ADC[251]=placeholder;
1147  placeholder=L0_TP_ADC[263];
1148  L0_TP_ADC[263]=L0_TP_ADC[267];
1149  L0_TP_ADC[267]=placeholder;
1150 
1151  //Loop over modules
1152  int k=0;
1153  int DSM_TP[kL0DsmInputs];
1154  for (int i=0;i<kL0DsmModule;i++){
1155 
1156  //Zero out 16 bit L0 TP/HT/HTTP outputs for each module
1157  DSM0_TP_SUM[i]=0;
1158  DSM0_HT_Bit[i]=0;
1159  DSM0_TP_Bit[i]=0;
1160  DSM0_HTTP_Bit[i]=0;
1161 
1162  DSM0_TP_SUM_J1[i]=0;
1163  DSM0_HT_Bit_J1[i]=0;
1164  DSM0_TP_Bit_J1[i]=0;
1165  DSM0_HTTP_Bit_J1[i]=0;
1166 
1167  DSM0_TP_SUM_J3[i]=0;
1168  DSM0_HT_Bit_J3[i]=0;
1169  DSM0_TP_Bit_J3[i]=0;
1170  DSM0_HTTP_Bit_J3[i]=0;
1171 
1172  //Zero out 16 bit L0 TP/HT/HTTP outputs for each L0 input
1173  for (int j=0;j<kL0DsmInputs;j++){
1174  DSM0_HT_tp_Bit[j]=0;
1175  DSM0_TP_tp_Bit[j]=0;
1176  DSM0_HTTP_tp_Bit[j]=0;
1177  DSM0_HT_tp_Bit_J1[j]=0;
1178  DSM0_TP_tp_Bit_J1[j]=0;
1179  DSM0_HTTP_tp_Bit_J1[j]=0;
1180  DSM0_HT_tp_Bit_J3[j]=0;
1181  DSM0_TP_tp_Bit_J3[j]=0;
1182  DSM0_HTTP_tp_Bit_J3[j]=0;
1183  }
1184 
1185  //Get array of TPid# from DSM module#
1186  mDecoder->GetTriggerPatchesFromDSM(i,DSM_TP);
1187 
1188 #ifdef DEBUG
1189  // Overwrite input to BEMC layer 0 DSMs (output of BEMC FEEs)
1190  // with content of trigger bank from MuDst (data only).
1191  // First fill the Layer0 histograms with results from FEEout()
1192  if (mHeadMaker->GetDataSet("MuDst")) {
1193  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
1194  for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
1195  mBEMCLayer0HT6bit->Fill(triggerPatch,emcTrig.highTower(triggerPatch));
1196  mBEMCLayer0TP6bit->Fill(triggerPatch,emcTrig.patch(triggerPatch));
1197  mBEMCLayer0HT6bitDiff->Fill(triggerPatch,emcTrig.highTower(triggerPatch)-L0_HT_ADC[triggerPatch]);
1198  mBEMCLayer0TP6bitDiff->Fill(triggerPatch,emcTrig.patch(triggerPatch)-L0_TP_ADC[triggerPatch]);
1199  L0_HT_ADC[triggerPatch] = emcTrig.highTower(triggerPatch);
1200  L0_TP_ADC[triggerPatch] = emcTrig.patch(triggerPatch);
1201  }
1202  }
1203 #endif
1204 
1205 
1206  //Loop over 10 inputs to each module
1207  for (int j=0;j<kL0DsmInputs;j++){
1208 
1209  int tpid=DSM_TP[j];
1210  int jpid=-1;
1211  int seq=-1;
1212  mDecoder->GetJetPatchAndSequenceFromTriggerPatch(tpid, jpid, seq);
1213 
1214  //Skip modules 2,7,12,17,22,27
1215  if (i%5!=2) {
1216 
1217  //apply HT thresholds to each HT adc in each TP
1218  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit[j]=0;
1219  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit[j]=1;
1220  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit[j]=2;
1221  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit[j]=3;
1222 
1223  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit[j]=0;
1224  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit[j]=1;
1225  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit[j]=2;
1226  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit[j]=3;
1227 
1228  //apply HTTP condition - TP&&HT
1229  if (DSM0_TP_tp_Bit[j] >= DSM0_HT_tp_Bit[j]) DSM0_HTTP_tp_Bit[j]=DSM0_HT_tp_Bit[j];
1230  if (DSM0_HT_tp_Bit[j] >= DSM0_TP_tp_Bit[j]) DSM0_HTTP_tp_Bit[j]=DSM0_TP_tp_Bit[j];
1231  //then || each input
1232  if (DSM0_HTTP_tp_Bit[j] > DSM0_HTTP_Bit[i]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
1233 
1234  //add up TP adc for 2/5 of JP
1235  DSM0_TP_SUM[i]+=L0_TP_ADC[tpid];
1236 
1237  if (DSM0_HT_Bit[i]< DSM0_HT_tp_Bit[j]) DSM0_HT_Bit[i]=DSM0_HT_tp_Bit[j];
1238  if (DSM0_TP_Bit[i]< DSM0_TP_tp_Bit[j]) DSM0_TP_Bit[i]=DSM0_TP_tp_Bit[j];
1239  if (DSM0_HTTP_Bit[i]< DSM0_HTTP_tp_Bit[j]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
1240  }
1241 
1242  //Loop over 2x5 inputs(TP) for modules 2,7,12,17,22,29
1243  if (i%5==2){
1244 
1245  if (j%2)
1246  {
1247  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J3[j]=0;
1248  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J3[j]=1;
1249  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J3[j]=2;
1250  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit_J3[j]=3;
1251  }
1252  else
1253  {
1254  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J1[j]=0;
1255  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J1[j]=1;
1256  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J1[j]=2;
1257  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit_J1[j]=3;
1258  }
1259 
1260  //apply TP thresholds to each TP adc in each TP
1261  if (j%2)
1262  {
1263  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J3[j]=0;
1264  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit_J3[j]=1;
1265  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit_J3[j]=2;
1266  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit_J3[j]=3;
1267  }
1268  else
1269  {
1270  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J1[j]=0;
1271  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit_J1[j]=1;
1272  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit_J1[j]=2;
1273  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit_J1[j]=3;
1274  }
1275 
1276 
1277  //apply HTTP condition - TP&&HT
1278  if (j%2)
1279  {
1280  if (DSM0_TP_tp_Bit_J3[j] >= DSM0_HT_tp_Bit_J3[j]) DSM0_HTTP_tp_Bit_J3[j]=DSM0_HT_tp_Bit_J3[j];
1281  if (DSM0_HT_tp_Bit_J3[j] >= DSM0_TP_tp_Bit_J3[j]) DSM0_HTTP_tp_Bit_J3[j]=DSM0_TP_tp_Bit_J3[j];
1282  if (DSM0_HTTP_tp_Bit_J3[j] > DSM0_HTTP_Bit_J3[j]) DSM0_HTTP_Bit_J3[j]=DSM0_HTTP_tp_Bit_J3[j];
1283  }
1284  else
1285  {
1286  if (DSM0_TP_tp_Bit_J1[j] >= DSM0_HT_tp_Bit_J1[j]) DSM0_HTTP_tp_Bit_J1[j]=DSM0_HT_tp_Bit_J1[j];
1287  if (DSM0_HT_tp_Bit_J1[j] >= DSM0_TP_tp_Bit_J1[j]) DSM0_HTTP_tp_Bit_J1[j]=DSM0_TP_tp_Bit_J1[j];
1288  if (DSM0_HTTP_tp_Bit_J1[j] > DSM0_HTTP_Bit_J1[j]) DSM0_HTTP_Bit_J1[j]=DSM0_HTTP_tp_Bit_J1[j];
1289  }
1290 
1291 
1292  //add up TP adc for 1/5 of JP
1293  if (j%2)
1294  DSM0_TP_SUM_J3[i]+=L0_TP_ADC[tpid];
1295  else
1296  DSM0_TP_SUM_J1[i]+=L0_TP_ADC[tpid];
1297 
1298  //apply HT/TP/HTTP thresholds to bits
1299  if (DSM0_HT_Bit_J1[i]< DSM0_HT_tp_Bit_J1[j]) DSM0_HT_Bit_J1[i]=DSM0_HT_tp_Bit_J1[j];
1300  if (DSM0_TP_Bit_J1[i]< DSM0_TP_tp_Bit_J1[j]) DSM0_TP_Bit_J1[i]=DSM0_TP_tp_Bit_J1[j];
1301  if (DSM0_HTTP_Bit_J1[i]< DSM0_HTTP_tp_Bit_J1[j]) DSM0_HTTP_Bit_J1[i]=DSM0_HTTP_tp_Bit_J1[j];
1302  if (DSM0_HT_Bit_J3[i]< DSM0_HT_tp_Bit_J3[j]) DSM0_HT_Bit_J3[i]=DSM0_HT_tp_Bit_J3[j];
1303  if (DSM0_TP_Bit_J3[i]< DSM0_TP_tp_Bit_J3[j]) DSM0_TP_Bit_J3[i]=DSM0_TP_tp_Bit_J3[j];
1304  if (DSM0_HTTP_Bit_J3[i]< DSM0_HTTP_tp_Bit_J3[j]) DSM0_HTTP_Bit_J3[i]=DSM0_HTTP_tp_Bit_J3[j];
1305 
1306  }
1307  }
1308 
1309  //k==8 is the problem
1310  if (i%5!=2)
1311  {
1312  L0_16bit_Out[k]=0;
1313  L0_16bit_Out[k++]=DSM0_TP_SUM[i]+(DSM0_HT_Bit[i]<<10)+(DSM0_TP_Bit[i]<<12)+(DSM0_HTTP_Bit[i]<<14);
1314  }
1315  if (i%5==2)
1316  {
1317  L0_16bit_Out[k]=0;
1318  //cout<<k<<" DSM0_HT_Bit_J3="<<DSM0_HT_Bit_J3[i]<<endl;
1319  L0_16bit_Out[k++]=DSM0_TP_SUM_J3[i]+(DSM0_HT_Bit_J3[i]<<10)+(DSM0_TP_Bit_J3[i]<<12)+(DSM0_HTTP_Bit_J3[i]<<14);
1320  //cout<<k<<" DSM0_HT_Bit_J1="<<DSM0_HT_Bit_J1[i]<<endl;
1321  L0_16bit_Out[k++]=DSM0_TP_SUM_J1[i]+(DSM0_HT_Bit_J1[i]<<10)+(DSM0_TP_Bit_J1[i]<<12)+(DSM0_HTTP_Bit_J1[i]<<14);
1322 
1323  }
1324 
1325  }
1326 
1327 #ifdef DEBUG
1328 
1329  // Fill diagnostic histograms
1330  if (mHeadMaker->GetDataSet("MuDst")) {
1331  // BEMC layer 1 DSMs are stored in this order in the trigger bank:
1332  // BE101, BE102, BE103, BW101, BW102, BW103
1333  // DSM channels are read out in this order:
1334  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
1335  // Trigger bank <-> Emulator ==> 0, 1, 2, 3, 4, 5 <-> 3, 4, 5, 0, 1, 2
1336  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
1337  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
1338 
1339  // Loop over BEMC layer 1 DSMs
1340  for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
1341  // Loop over layer 1 input channels
1342  for (int ch = 0; ch < kL1DsmInputs; ++ch) {
1343 
1344  Int_t idx = dsm*8+dsm_read_map[ch];
1345  Int_t TrigBankOut = emcTrig.bemcLayer1(idx);
1346  Int_t TPSumout = (TrigBankOut & 0x3ff);
1347  Int_t TPSumbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3ff);
1348  Int_t HTout = (TrigBankOut & 0xc00)/0x400;
1349  Int_t HTbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc00)/0x400;
1350  Int_t TPout = (TrigBankOut & 0x3000)/0x1000;
1351  Int_t TPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3000)/0x1000;
1352  Int_t HTTPout = (TrigBankOut & 0xc000)/0x4000;
1353  Int_t HTTPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc000)/0x4000;
1354  int TPSumdiff = (TPSumbits)-(TPSumout);
1355  int HTdiff = (HTbits) - (HTout);
1356  int TPdiff = (TPbits) - (TPout);
1357  int HTTPdiff = (HTTPbits) - (HTTPout);
1358  mBEMCLayer1PatchSum->Fill(dsm*6+ch, TPSumout);
1359  mBEMCLayer1HTBits->Fill(dsm*6+ch, HTout);
1360  mBEMCLayer1TPBits->Fill(dsm*6+ch, TPout);
1361  mBEMCLayer1HTTPBits->Fill(dsm*6+ch, HTTPout);
1362  mBEMCLayer1PatchSumDiff->Fill(dsm*6+ch, TPSumdiff);
1363  mBEMCLayer1HTBitsDiff->Fill(dsm*6+ch, HTdiff);
1364  mBEMCLayer1TPBitsDiff->Fill(dsm*6+ch, TPdiff);
1365  mBEMCLayer1HTTPBitsDiff->Fill(dsm*6+ch, HTTPdiff);
1366  }
1367  }
1368  }
1369 #endif
1370 
1371 }
1372 
1373 
1374 //==================================================
1375 //==================================================
1376 void StBemcTriggerSimu::get2006_DSMLayer1(){
1377 
1378 
1379  //DSM_Layer0 is passed to DSM_Layer1 in 8 UShort blocks (16 bits)
1380  //There are 6 DSM_Layer1 boards and each can take 120 bits total
1381  //So DSM_Layer0 passes 8 shorts (16*8=128) or 128 bits to each DSM_Layer1
1382 
1383  //Zero out the DSMLayer1 Bits passed to DSMLayer2
1384  for (int i=0;i<kL1DsmModule;i++){
1385  DSM1_JP_Bit[i]=0;
1386  DSM1_HTj0_Bit[i]=0;
1387  DSM1_HTj1_Bit[i]=0;
1388  DSM1_TP_Bit[i]=0;
1389  DSM1_HTTP_Bit[i]=0;
1390  DSM1_ETOT_ADC[i]=0;
1391  }
1392 
1393 
1394 #ifdef DEBUG
1395  // Overwrite input to BEMC layer 1 DSMs (output of BEMC layer 0 DSMs)
1396  // with content of trigger bank from MuDst (data only).
1397  if (mHeadMaker->GetDataSet("MuDst")) {
1398  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
1399  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
1400  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
1401  for (int dsm = 0; dsm < 6; ++dsm) {
1402  int offset = TriggerBankToSimuMap[dsm]*5;
1403  DSM0_TP_SUM [offset+0] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[0]) & 0x3ff;
1404  DSM0_TP_SUM [offset+1] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[1]) & 0x3ff;
1405  DSM0_TP_SUM_J3[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[2]) & 0x1ff;
1406  DSM0_TP_SUM_J1[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[3]) & 0x1ff;
1407  DSM0_TP_SUM [offset+3] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[4]) & 0x3ff;
1408  DSM0_TP_SUM [offset+4] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[5]) & 0x3ff;
1409  }
1410  }
1411 #endif
1412 
1413  //Sum TP ADC into JP's
1414  // West
1415  DSM1_JP_ADC[0]=DSM0_TP_SUM[0]+DSM0_TP_SUM[1]+DSM0_TP_SUM_J3[2];
1416  DSM1_JP_ADC[1]=DSM0_TP_SUM[3]+DSM0_TP_SUM[4]+DSM0_TP_SUM_J1[2];
1417  DSM1_JP_ADC[2]=DSM0_TP_SUM[5]+DSM0_TP_SUM[6]+DSM0_TP_SUM_J3[7];
1418  DSM1_JP_ADC[3]=DSM0_TP_SUM[8]+DSM0_TP_SUM[9]+DSM0_TP_SUM_J1[7];
1419  DSM1_JP_ADC[4]=DSM0_TP_SUM[10]+DSM0_TP_SUM[11]+DSM0_TP_SUM_J3[12];
1420  DSM1_JP_ADC[5]=DSM0_TP_SUM[13]+DSM0_TP_SUM[14]+DSM0_TP_SUM_J1[12];
1421 
1422  // East
1423  DSM1_JP_ADC[6]=DSM0_TP_SUM[15]+DSM0_TP_SUM[16]+DSM0_TP_SUM_J1[17];
1424  DSM1_JP_ADC[7]=DSM0_TP_SUM[18]+DSM0_TP_SUM[19]+DSM0_TP_SUM_J3[17];
1425  DSM1_JP_ADC[8]=DSM0_TP_SUM[20]+DSM0_TP_SUM[21]+DSM0_TP_SUM_J1[22];
1426  DSM1_JP_ADC[9]=DSM0_TP_SUM[23]+DSM0_TP_SUM[24]+DSM0_TP_SUM_J3[22];
1427  DSM1_JP_ADC[10]=DSM0_TP_SUM[25]+DSM0_TP_SUM[26]+DSM0_TP_SUM_J1[27];
1428  DSM1_JP_ADC[11]=DSM0_TP_SUM[28]+DSM0_TP_SUM[29]+DSM0_TP_SUM_J3[27];
1429 
1430  for (int hh=0;hh<12;hh++) JP_adc_holder[hh]=DSM1_JP_ADC[hh];
1431 
1432  //Test each JP and see if it passed
1433  for (int i=0;i<kNJet;i++)
1434  {
1435  DSM1_JP_jp_Bit[i]=0;
1436  if ( DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,0)) DSM1_JP_jp_Bit[i]=0;
1437  if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,0))) DSM1_JP_jp_Bit[i]=1;
1438  if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,1))) DSM1_JP_jp_Bit[i]=2;
1439  if ( DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) DSM1_JP_jp_Bit[i]=3;
1440  }
1441 
1442 
1443  int mod;
1444  //Translate JP's into 2 bits to pass to DSMLayer2
1445  for (int i=0;i<kNJet;i++){
1446  if (i < (kNJet/2)) mod = 0;
1447  else mod = 1;
1448  DSM1_ETOT_ADC[mod]+=DSM1_JP_ADC[i];
1449  if ( DSM1_JP_Bit[i/2] < DSM1_JP_jp_Bit[i]) DSM1_JP_Bit[i/2]=DSM1_JP_jp_Bit[i];
1450  }
1451 
1452 
1453  //HTTP and TP bits
1454  for (int i=0; i<kL1DsmModule; i++){
1455  for (int j=0; j<5; j++){
1456  int k= i*5 + j;
1457  int kk=i*5 + 2;
1458  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit[k]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit[k];
1459  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J3[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J3[kk];
1460  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J1[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J1[kk];
1461  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit[k]) DSM1_TP_Bit[i]=DSM0_TP_Bit[k];
1462  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J3[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J3[kk];
1463  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J1[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J1[kk];
1464  }
1465 
1466  if (DSM1_HTTP_Bit[i]>=2) DSM1_HTTP_Bit[i]=1;
1467  else if (DSM1_HTTP_Bit[i]<2) DSM1_HTTP_Bit[i]=0;
1468 
1469  if (DSM1_TP_Bit[i]>=2) DSM1_TP_Bit[i]=1;
1470  else if (DSM1_TP_Bit[i]<2) DSM1_TP_Bit[i]=0;
1471  }
1472 
1473 
1474  //WEST HT bits
1475  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[0]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[0];
1476  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[1]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[1];
1477  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit_J3[2]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit_J3[2];
1478  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit_J1[2]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit_J1[2];
1479  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[3]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[3];
1480  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[4]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[4];
1481 
1482  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[5]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[5];
1483  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[6]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[6];
1484  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit_J3[7]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit_J3[7];
1485  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit_J1[7]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit_J1[7];
1486  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[8]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[8];
1487  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[9]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[9];
1488 
1489  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[10]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[10];
1490  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[11]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[11];
1491  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit_J3[12]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit_J3[12];
1492  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit_J1[12]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit_J1[12];
1493  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[13]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[13];
1494  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[14]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[14];
1495 
1496  //EAST HT bits
1497  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[15]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[15];
1498  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[16]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[16];
1499  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit_J1[17]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit_J1[17];
1500  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit_J3[17]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit_J3[17];
1501  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[18]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[18];
1502  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[19]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[19];
1503 
1504  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[20]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[20];
1505  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[21]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[21];
1506  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit_J1[22]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit_J1[22];
1507  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit_J3[22]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit_J3[22];
1508  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[23]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[23];
1509  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[24]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[24];
1510 
1511  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[25]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[25];
1512  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[26]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[26];
1513  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit_J1[27]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit_J1[27];
1514  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit_J3[27]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit_J3[27];
1515  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[28]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[28];
1516  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[29]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[29];
1517 
1518 
1519 
1520 
1521 
1522  //Drop two lowest bits for ETOT and OR Bits>6 with 6
1523  for (int i=0;i<kL1DsmModule;i++) {
1524  DSM1_ETOT_ADC[i]/=4;
1525  if (DSM1_ETOT_ADC[i]>31) DSM1_ETOT_ADC[i]=31;
1526  }
1527 
1528 
1529 #ifdef DEBUG
1530 
1531  if (mHeadMaker->GetDataSet("MuDst")) {
1532  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
1533  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
1534  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
1535  for (int dsm = 0; dsm < kL2DsmModule; ++dsm) {
1536  for (int ch = 0; ch < 6; ++ch) {
1537  int idx = dsm_read_map[ch];
1538  int TrigBankOut = emcTrig.emcLayer2(idx);
1539  int jetPatch = 2 * TriggerBankToSimuMap[ch];
1540  int sum = DSM1_JP_ADC[jetPatch] + DSM1_JP_ADC[jetPatch+1];
1541  sum = (sum >> 7) ? 31 : (sum >> 2 & 0x1f);
1542  int diff = (TrigBankOut & 0x1f) - (sum & 0x1f);
1543  mBEMCLayer2PatchSum->Fill(ch, TrigBankOut & 0x1f);
1544  mBEMCLayer2PatchSumDiff->Fill(ch, diff);
1545  diff = (TrigBankOut >> 7 & 0x1) - (DSM1_HTTP_Bit[TriggerBankToSimuMap[ch]]);
1546  mBEMCLayer2HTTPBits->Fill(ch, TrigBankOut >> 7 & 0x1);
1547  mBEMCLayer2HTTPBitsDiff->Fill(ch,diff);
1548  diff = (TrigBankOut >> 9 & 0x1) - (DSM1_TP_Bit[TriggerBankToSimuMap[ch]]);
1549  mBEMCLayer2TPBits->Fill(ch, TrigBankOut >> 9 & 0x1);
1550  mBEMCLayer2TPBitsDiff->Fill(ch,diff);
1551  diff = (TrigBankOut >> 10 & 0x3) - (DSM1_JP_Bit[TriggerBankToSimuMap[ch]]);
1552  mBEMCLayer2JPBits->Fill(ch, TrigBankOut >> 10 & 0x3);
1553  mBEMCLayer2JPBitsDiff->Fill(ch, diff);
1554  diff = (TrigBankOut >> 12 & 0x3) - (DSM1_HTj0_Bit[TriggerBankToSimuMap[ch]]);
1555  mBEMCLayer2HTj0Bits->Fill(ch, TrigBankOut >> 12 & 0x3);
1556  mBEMCLayer2HTj0BitsDiff->Fill(ch,diff);
1557  diff = (TrigBankOut >> 14 & 0x3) - (DSM1_HTj1_Bit[TriggerBankToSimuMap[ch]]);
1558  mBEMCLayer2HTj1Bits->Fill(ch, TrigBankOut >> 14 & 0x3);
1559  mBEMCLayer2HTj1BitsDiff->Fill(ch,diff);
1560 
1561  }
1562  }
1563  }
1564 #endif
1565 
1566 }
1567 
1568 void StBemcTriggerSimu::get2006_DSMLayer2()
1569 {
1570 
1571  // In hardware the final trigger decisions are made in the TCU
1572  // It is not possible to compare the emulator with the TCU input
1573  // so all final trigger decisions for the BEMC are made at Layer2
1574  // in this code
1575 
1576  Int_t DSM2_JP_Bit=0;
1577  Int_t DSM2_HT_Bit=0;
1578  //Int_t DSM2_Esum_Bit=0;
1579  //Int_t DSM2_Topo_Bit=0;
1580  Int_t DSM2_HTTP_Bit=0;
1581  Int_t DSM2_TP_Bit=0;
1582 
1583 
1584  for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
1585 
1586  if (DSM2_JP_Bit<DSM1_JP_Bit[dsm]) DSM2_JP_Bit=DSM1_JP_Bit[dsm];
1587  if (DSM2_HTTP_Bit<DSM1_HTTP_Bit[dsm]) DSM2_HTTP_Bit=DSM1_HTTP_Bit[dsm];
1588  if (DSM2_HT_Bit<DSM1_HTj0_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj0_Bit[dsm];
1589  if (DSM2_HT_Bit<DSM1_HTj1_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj1_Bit[dsm];
1590  if (DSM2_TP_Bit<DSM1_TP_Bit[dsm]) DSM2_TP_Bit=DSM1_TP_Bit[dsm];
1591  }
1592 
1593  //HT
1594  if (DSM2_HT_Bit > 2){
1595  mFiredTriggers.push_back(127212);
1596  mFiredTriggers.push_back(137213);
1597  }
1598 
1599  //HTTP trigger
1600  if (DSM2_HTTP_Bit==1) {
1601  mFiredTriggers.push_back(127611);
1602  mFiredTriggers.push_back(127821);
1603  mFiredTriggers.push_back(137821);
1604  mFiredTriggers.push_back(137822);
1605  mFiredTriggers.push_back(137611);
1606  mFiredTriggers.push_back(5);
1607 
1608  // Upsilon triggers
1609  mFiredTriggers.push_back(117601);
1610  mFiredTriggers.push_back(117602);
1611  mFiredTriggers.push_back(137602);
1612  mFiredTriggers.push_back(137603);
1613  }
1614 
1615 
1616  //JP Trigger
1617  if (DSM2_JP_Bit >= 1) {
1618  mFiredTriggers.push_back(127501);
1619  mFiredTriggers.push_back(137501);
1620  mFiredTriggers.push_back(127622);
1621  mFiredTriggers.push_back(137622);
1622  }
1623 
1624  if (DSM2_JP_Bit >= 2) {
1625  mFiredTriggers.push_back(127221);
1626  mFiredTriggers.push_back(137221);
1627  mFiredTriggers.push_back(137222);
1628  }
1629 
1630  // J/psi topology trigger
1631  //
1632  // See http://www.star.bnl.gov/public/trg/TSL/Software/EMC_2006.pdf
1633  //
1634  // The J/psi trigger uses just the high tower threshold bits of the Barrel,
1635  // not the Endcap. R2 selects ONE of the high-tower thresholds for this trigger.
1636  // The J/psi trigger fires if two opposite jet patches have high towers
1637  // above the selected threshold.
1638  //
1639  // +-----------+----------+------------+------------+
1640  // | DSM index | DSM name | j0 | j1 |
1641  // +-----------+----------+------------+------------+
1642  // | 0 | BE101 | 10' (JP6) | 12' (JP7) |
1643  // | 1 | BE102 | 2' (JP8) | 4' (JP9) |
1644  // | 2 | BE103 | 6' (JP10) | 8' (JP11) |
1645  // | 3 | BW101 | 10' (JP0) | 12' (JP1) |
1646  // | 4 | BW102 | 2' (JP2) | 4' (JP3) |
1647  // | 5 | BW103 | 6' (JP4) | 8' (JP5) |
1648  // +-----------+----------+------------+------------+
1649  //
1650  // The J/psi topology trigger uses register R2 to select the
1651  // high tower threshold used for each decay electron of the J/psi.
1652  // In Run 6, R2 was always set to th0. So it is hardcoded to 1
1653  // in the code below. Possible values are:
1654  // 0 - th0; 1 - th1; 2 - th2; 3 - J/psi logic OFF.
1655  //
1656  // Vector bits (0-5) correspond to positions 2,4,6,8,10,12 o'clock.
1657 
1658  int barrel_east_ht_jpsi[6];
1659 
1660  barrel_east_ht_jpsi[0] = DSM1_HTj0_Bit[1] >= 1; // 2 o'clock
1661  barrel_east_ht_jpsi[1] = DSM1_HTj1_Bit[1] >= 1; // 4 o'clock
1662  barrel_east_ht_jpsi[2] = DSM1_HTj0_Bit[2] >= 1; // 6 o'clock
1663  barrel_east_ht_jpsi[3] = DSM1_HTj1_Bit[2] >= 1; // 8 o'clock
1664  barrel_east_ht_jpsi[4] = DSM1_HTj0_Bit[0] >= 1; // 10 o'clock
1665  barrel_east_ht_jpsi[5] = DSM1_HTj1_Bit[0] >= 1; // 12 o'clock
1666 
1667  int barrel_west_ht_jpsi[6];
1668 
1669  barrel_west_ht_jpsi[0] = DSM1_HTj0_Bit[4] >= 1; // 2 o'clock
1670  barrel_west_ht_jpsi[1] = DSM1_HTj1_Bit[4] >= 1; // 4 o'clock
1671  barrel_west_ht_jpsi[2] = DSM1_HTj0_Bit[5] >= 1; // 6 o'clock
1672  barrel_west_ht_jpsi[3] = DSM1_HTj1_Bit[5] >= 1; // 8 o'clock
1673  barrel_west_ht_jpsi[4] = DSM1_HTj0_Bit[3] >= 1; // 10 o'clock
1674  barrel_west_ht_jpsi[5] = DSM1_HTj1_Bit[3] >= 1; // 12 o'clock
1675 
1676  int ht_jpsi[6];
1677 
1678  for (int i = 0; i < 6; ++i) ht_jpsi[i] = barrel_east_ht_jpsi[i] || barrel_west_ht_jpsi[i];
1679 
1680  int jpsiTrigger = ((ht_jpsi[0] && (ht_jpsi[2] || ht_jpsi[3] || ht_jpsi[4])) ||
1681  (ht_jpsi[1] && (ht_jpsi[3] || ht_jpsi[4] || ht_jpsi[5])) ||
1682  (ht_jpsi[2] && (ht_jpsi[4] || ht_jpsi[5])) ||
1683  (ht_jpsi[3] && ht_jpsi[5]));
1684 
1685  // jpsi-mb trigger
1686  if (jpsiTrigger) {
1687  mFiredTriggers.push_back(117705);
1688  mFiredTriggers.push_back(137705);
1689 
1690  // Collect all towers above threshold and group them
1691  // by phi position, i.e. 2, 4, ..., 12 o'clock.
1692  const int phipos[] = { 4, 5, 0, 1, 2, 3, 4, 5, 0, 1, 2, 3 }; // JP0-JP11
1693  vector<int> ht_jpsi_ids[6];
1694 
1695  for (int towerId = 1; towerId <= kNTowers; ++towerId) {
1696  int triggerPatch, dsm;
1697  mDecoder->GetTriggerPatchFromTowerId(towerId,triggerPatch);
1698  mDecoder->GetDSMFromTriggerPatch(triggerPatch,dsm);
1699 
1700  if (HT6bit_adc_holder[towerId-1] > mDbThres->GetHT_DSM0_threshold(dsm,timestamp,0)) {
1701  int jetPatch;
1702  mDecoder->GetJetPatchFromTowerId(towerId,jetPatch);
1703  ht_jpsi_ids[phipos[jetPatch]].push_back(towerId);
1704  }
1705  }
1706 
1707  // Make J/psi candidates
1708  get2006_JpsiCandidates(ht_jpsi_ids[0],ht_jpsi_ids[2]); // 2 o'clock and 6 o'clock
1709  get2006_JpsiCandidates(ht_jpsi_ids[0],ht_jpsi_ids[3]); // 2 o'clock and 8 o'clock
1710  get2006_JpsiCandidates(ht_jpsi_ids[0],ht_jpsi_ids[4]); // 2 o'clock and 10 o'clock
1711  get2006_JpsiCandidates(ht_jpsi_ids[1],ht_jpsi_ids[3]); // 4 o'clock and 8 o'clock
1712  get2006_JpsiCandidates(ht_jpsi_ids[1],ht_jpsi_ids[4]); // 4 o'clock and 10 o'clock
1713  get2006_JpsiCandidates(ht_jpsi_ids[1],ht_jpsi_ids[5]); // 4 o'clock and 12 o'clock
1714  get2006_JpsiCandidates(ht_jpsi_ids[2],ht_jpsi_ids[4]); // 6 o'clock and 10 o'clock
1715  get2006_JpsiCandidates(ht_jpsi_ids[2],ht_jpsi_ids[5]); // 6 o'clock and 12 o'clock
1716  get2006_JpsiCandidates(ht_jpsi_ids[3],ht_jpsi_ids[5]); // 8 o'clock and 12 o'clock
1717 
1718 #if 0
1719  LOG_INFO << "nJpsiCandidates = " << mJpsiCandidates.size() << endm;
1720 
1721  for (size_t i = 0; i < mJpsiCandidates.size(); ++i) {
1722  const pair<int,int>& towers = mJpsiCandidates[i];
1723  LOG_INFO << towers.first << " " << towers.second << endm;
1724  }
1725 #endif
1726  }
1727 }
1728 
1729 void StBemcTriggerSimu::get2006_JpsiCandidates(const vector<int>& towerIds1, const vector<int>& towerIds2)
1730 {
1731  for (size_t i = 0; i < towerIds1.size(); ++i)
1732  for (size_t j = 0; j < towerIds2.size(); ++j)
1733  mJpsiCandidates.push_back(make_pair(towerIds1[i],towerIds2[j]));
1734 }
1735 
1736 //==================================================
1737 //==================================================
1738 void StBemcTriggerSimu::get2007_DSMLayer0() {
1739 
1740  //0-(8)9 ADC sum Trigger Patches
1741  //10-11 HT threshold bits
1742  //12-13 TP threshold bits
1743  //14-15 HT&&TP threshold bits
1744 
1745  //Loop over modules
1746  int k=0;
1747  int DSM_TP[kL0DsmInputs];
1748  for (int i=0;i<kL0DsmModule;i++){
1749 
1750  //Zero out 16 bit L0 TP/HT/HTTP outputs for each module
1751  DSM0_TP_SUM[i]=0;
1752  DSM0_HT_Bit[i]=0;
1753  DSM0_TP_Bit[i]=0;
1754  DSM0_HTTP_Bit[i]=0;
1755 
1756  DSM0_TP_SUM_J1[i]=0;
1757  DSM0_HT_Bit_J1[i]=0;
1758  DSM0_TP_Bit_J1[i]=0;
1759  DSM0_HTTP_Bit_J1[i]=0;
1760 
1761  DSM0_TP_SUM_J3[i]=0;
1762  DSM0_HT_Bit_J3[i]=0;
1763  DSM0_TP_Bit_J3[i]=0;
1764  DSM0_HTTP_Bit_J3[i]=0;
1765 
1766  //Zero out 16 bit L0 TP/HT/HTTP outputs for each L0 input
1767  for (int j=0;j<kL0DsmInputs;j++){
1768  DSM0_HT_tp_Bit[j]=0;
1769  DSM0_TP_tp_Bit[j]=0;
1770  DSM0_HTTP_tp_Bit[j]=0;
1771  DSM0_HT_tp_Bit_J1[j]=0;
1772  DSM0_TP_tp_Bit_J1[j]=0;
1773  DSM0_HTTP_tp_Bit_J1[j]=0;
1774  DSM0_HT_tp_Bit_J3[j]=0;
1775  DSM0_TP_tp_Bit_J3[j]=0;
1776  DSM0_HTTP_tp_Bit_J3[j]=0;
1777  }
1778 
1779  //Get array of TPid# from DSM module#
1780  mDecoder->GetTriggerPatchesFromDSM(i,DSM_TP);
1781 
1782 #ifdef DEBUG
1783  // Overwrite input to BEMC layer 0 DSMs (output of BEMC FEEs)
1784  // with content of trigger bank from MuDst (data only).
1785  // First fill the Layer0 histograms with results from FEEout()
1786  if (mHeadMaker->GetDataSet("MuDst")) {
1787  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
1788  for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
1789  mBEMCLayer0HT6bit->Fill(triggerPatch,emcTrig.highTower(triggerPatch));
1790  mBEMCLayer0TP6bit->Fill(triggerPatch,emcTrig.patch(triggerPatch));
1791  mBEMCLayer0HT6bitDiff->Fill(triggerPatch,emcTrig.highTower(triggerPatch)-L0_HT_ADC[triggerPatch]);
1792  mBEMCLayer0TP6bitDiff->Fill(triggerPatch,emcTrig.patch(triggerPatch)-L0_TP_ADC[triggerPatch]);
1793  L0_HT_ADC[triggerPatch] = emcTrig.highTower(triggerPatch);
1794  L0_TP_ADC[triggerPatch] = emcTrig.patch(triggerPatch);
1795  }
1796  }
1797 #endif
1798 
1799 
1800  //Loop over 10 inputs to each module
1801  for (int j=0;j<kL0DsmInputs;j++){
1802 
1803  int tpid=DSM_TP[j];
1804  int jpid=-1;
1805  int seq=-1;
1806  mDecoder->GetJetPatchAndSequenceFromTriggerPatch(tpid, jpid, seq);
1807 
1808  //Skip modules 2,7,12,17,22,27
1809  if (i%5!=2) {
1810 
1811  //apply HT thresholds to each HT adc in each TP
1812  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit[j]=0;
1813  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit[j]=1;
1814  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit[j]=2;
1815  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit[j]=3;
1816 
1817  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit[j]=0;
1818  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit[j]=1;
1819  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit[j]=2;
1820  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit[j]=3;
1821 
1822  //apply HTTP condition - TP&&HT
1823  if (DSM0_TP_tp_Bit[j] >= DSM0_HT_tp_Bit[j]) DSM0_HTTP_tp_Bit[j]=DSM0_HT_tp_Bit[j];
1824  if (DSM0_HT_tp_Bit[j] >= DSM0_TP_tp_Bit[j]) DSM0_HTTP_tp_Bit[j]=DSM0_TP_tp_Bit[j];
1825  //then || each input
1826  if (DSM0_HTTP_tp_Bit[j] > DSM0_HTTP_Bit[i]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
1827 
1828  //add up TP adc for 2/5 of JP
1829  DSM0_TP_SUM[i]+=L0_TP_ADC[tpid];
1830 
1831  if (DSM0_HT_Bit[i]< DSM0_HT_tp_Bit[j]) DSM0_HT_Bit[i]=DSM0_HT_tp_Bit[j];
1832  if (DSM0_TP_Bit[i]< DSM0_TP_tp_Bit[j]) DSM0_TP_Bit[i]=DSM0_TP_tp_Bit[j];
1833  if (DSM0_HTTP_Bit[i]< DSM0_HTTP_tp_Bit[j]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
1834  }
1835 
1836  //Loop over 2x5 inputs(TP) for modules 2,7,12,17,22,29
1837  if (i%5==2){
1838 
1839  if (j%2)
1840  {
1841  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J3[j]=0;
1842  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J3[j]=1;
1843  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J3[j]=2;
1844  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit_J3[j]=3;
1845  }
1846  else
1847  {
1848  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J1[j]=0;
1849  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J1[j]=1;
1850  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J1[j]=2;
1851  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) DSM0_HT_tp_Bit_J1[j]=3;
1852  }
1853 
1854  //apply TP thresholds to each TP adc in each TP
1855  if (j%2)
1856  {
1857  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J3[j]=0;
1858  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit_J3[j]=1;
1859  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit_J3[j]=2;
1860  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit_J3[j]=3;
1861  }
1862  else
1863  {
1864  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J1[j]=0;
1865  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,1)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0))) DSM0_TP_tp_Bit_J1[j]=1;
1866  if ((L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) && (L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,1))) DSM0_TP_tp_Bit_J1[j]=2;
1867  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,2)) DSM0_TP_tp_Bit_J1[j]=3;
1868  }
1869 
1870 
1871  //apply HTTP condition - TP&&HT
1872  if (j%2)
1873  {
1874  if (DSM0_TP_tp_Bit_J3[j] >= DSM0_HT_tp_Bit_J3[j]) DSM0_HTTP_tp_Bit_J3[j]=DSM0_HT_tp_Bit_J3[j];
1875  if (DSM0_HT_tp_Bit_J3[j] >= DSM0_TP_tp_Bit_J3[j]) DSM0_HTTP_tp_Bit_J3[j]=DSM0_TP_tp_Bit_J3[j];
1876  if (DSM0_HTTP_tp_Bit_J3[j] > DSM0_HTTP_Bit_J3[j]) DSM0_HTTP_Bit_J3[j]=DSM0_HTTP_tp_Bit_J3[j];
1877  }
1878  else
1879  {
1880  if (DSM0_TP_tp_Bit_J1[j] >= DSM0_HT_tp_Bit_J1[j]) DSM0_HTTP_tp_Bit_J1[j]=DSM0_HT_tp_Bit_J1[j];
1881  if (DSM0_HT_tp_Bit_J1[j] >= DSM0_TP_tp_Bit_J1[j]) DSM0_HTTP_tp_Bit_J1[j]=DSM0_TP_tp_Bit_J1[j];
1882  if (DSM0_HTTP_tp_Bit_J1[j] > DSM0_HTTP_Bit_J1[j]) DSM0_HTTP_Bit_J1[j]=DSM0_HTTP_tp_Bit_J1[j];
1883  }
1884 
1885 
1886  //add up TP adc for 1/5 of JP
1887  if (j%2)
1888  DSM0_TP_SUM_J3[i]+=L0_TP_ADC[tpid];
1889  else
1890  DSM0_TP_SUM_J1[i]+=L0_TP_ADC[tpid];
1891 
1892  //apply HT/TP/HTTP thresholds to bits
1893  if (DSM0_HT_Bit_J1[i]< DSM0_HT_tp_Bit_J1[j]) DSM0_HT_Bit_J1[i]=DSM0_HT_tp_Bit_J1[j];
1894  if (DSM0_TP_Bit_J1[i]< DSM0_TP_tp_Bit_J1[j]) DSM0_TP_Bit_J1[i]=DSM0_TP_tp_Bit_J1[j];
1895  if (DSM0_HTTP_Bit_J1[i]< DSM0_HTTP_tp_Bit_J1[j]) DSM0_HTTP_Bit_J1[i]=DSM0_HTTP_tp_Bit_J1[j];
1896  if (DSM0_HT_Bit_J3[i]< DSM0_HT_tp_Bit_J3[j]) DSM0_HT_Bit_J3[i]=DSM0_HT_tp_Bit_J3[j];
1897  if (DSM0_TP_Bit_J3[i]< DSM0_TP_tp_Bit_J3[j]) DSM0_TP_Bit_J3[i]=DSM0_TP_tp_Bit_J3[j];
1898  if (DSM0_HTTP_Bit_J3[i]< DSM0_HTTP_tp_Bit_J3[j]) DSM0_HTTP_Bit_J3[i]=DSM0_HTTP_tp_Bit_J3[j];
1899 
1900  }
1901  }
1902 
1903  //k==8 is the problem
1904  if (i%5!=2)
1905  {
1906  L0_16bit_Out[k]=0;
1907  L0_16bit_Out[k++]=DSM0_TP_SUM[i]+(DSM0_HT_Bit[i]<<10)+(DSM0_TP_Bit[i]<<12)+(DSM0_HTTP_Bit[i]<<14);
1908  }
1909  if (i%5==2)
1910  {
1911  L0_16bit_Out[k]=0;
1912  //cout<<k<<" DSM0_HT_Bit_J3="<<DSM0_HT_Bit_J3[i]<<endl;
1913  L0_16bit_Out[k++]=DSM0_TP_SUM_J3[i]+(DSM0_HT_Bit_J3[i]<<10)+(DSM0_TP_Bit_J3[i]<<12)+(DSM0_HTTP_Bit_J3[i]<<14);
1914  //cout<<k<<" DSM0_HT_Bit_J1="<<DSM0_HT_Bit_J1[i]<<endl;
1915  L0_16bit_Out[k++]=DSM0_TP_SUM_J1[i]+(DSM0_HT_Bit_J1[i]<<10)+(DSM0_TP_Bit_J1[i]<<12)+(DSM0_HTTP_Bit_J1[i]<<14);
1916 
1917  }
1918 
1919  }
1920 
1921 #ifdef DEBUG
1922 
1923  // Fill diagnostic histograms
1924  if (mHeadMaker->GetDataSet("MuDst")) {
1925  // BEMC layer 1 DSMs are stored in this order in the trigger bank:
1926  // BE101, BE102, BE103, BW101, BW102, BW103
1927  // DSM channels are read out in this order:
1928  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
1929  // Trigger bank <-> Emulator ==> 0, 1, 2, 3, 4, 5 <-> 3, 4, 5, 0, 1, 2
1930  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
1931  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
1932 
1933  // Loop over BEMC layer 1 DSMs
1934  for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
1935  // Loop over layer 1 input channels
1936  for (int ch = 0; ch < kL1DsmInputs; ++ch) {
1937 
1938  Int_t idx = dsm*8+dsm_read_map[ch];
1939  Int_t TrigBankOut = emcTrig.bemcLayer1(idx);
1940  Int_t TPSumout = (TrigBankOut & 0x3ff);
1941  Int_t TPSumbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3ff);
1942  Int_t HTout = (TrigBankOut & 0xc00)/0x400;
1943  Int_t HTbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc00)/0x400;
1944  Int_t TPout = (TrigBankOut & 0x3000)/0x1000;
1945  Int_t TPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3000)/0x1000;
1946  Int_t HTTPout = (TrigBankOut & 0xc000)/0x4000;
1947  Int_t HTTPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc000)/0x4000;
1948  int TPSumdiff = (TPSumbits)-(TPSumout);
1949  int HTdiff = (HTbits) - (HTout);
1950  int TPdiff = (TPbits) - (TPout);
1951  int HTTPdiff = (HTTPbits) - (HTTPout);
1952  mBEMCLayer1PatchSum->Fill(dsm*6+ch, TPSumout);
1953  mBEMCLayer1HTBits->Fill(dsm*6+ch, HTout);
1954  mBEMCLayer1TPBits->Fill(dsm*6+ch, TPout);
1955  mBEMCLayer1HTTPBits->Fill(dsm*6+ch, HTTPout);
1956  mBEMCLayer1PatchSumDiff->Fill(dsm*6+ch, TPSumdiff);
1957  mBEMCLayer1HTBitsDiff->Fill(dsm*6+ch, HTdiff);
1958  mBEMCLayer1TPBitsDiff->Fill(dsm*6+ch, TPdiff);
1959  mBEMCLayer1HTTPBitsDiff->Fill(dsm*6+ch, HTTPdiff);
1960 
1961  }
1962  }
1963  }
1964 #endif
1965 
1966 }
1967 
1968 
1969 //==================================================
1970 //==================================================
1971 void StBemcTriggerSimu::get2007_DSMLayer1(){
1972 
1973 
1974  //DSM_Layer0 is passed to DSM_Layer1 in 8 UShort blocks (16 bits)
1975  //There are 6 DSM_Layer1 boards and each can take 120 bits total
1976  //So DSM_Layer0 passes 8 shorts (16*8=128) or 128 bits to each DSM_Layer1
1977 
1978  //Zero out the DSMLayer1 Bits passed to DSMLayer2
1979  for (int i=0;i<kL1DsmModule;i++){
1980  DSM1_JP_Bit[i]=0;
1981  DSM1_HTj0_Bit[i]=0;
1982  DSM1_HTj1_Bit[i]=0;
1983  DSM1_TP_Bit[i]=0;
1984  DSM1_HTTP_Bit[i]=0;
1985  DSM1_ETOT_ADC[i]=0;
1986  }
1987 
1988 
1989 #ifdef DEBUG
1990  // Overwrite input to BEMC layer 1 DSMs (output of BEMC layer 0 DSMs)
1991  // with content of trigger bank from MuDst (data only).
1992  if (mHeadMaker->GetDataSet("MuDst")) {
1993  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
1994  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
1995  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
1996  for (int dsm = 0; dsm < 6; ++dsm) {
1997  int offset = TriggerBankToSimuMap[dsm]*5;
1998  DSM0_TP_SUM [offset+0] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[0]) & 0x3ff;
1999  DSM0_TP_SUM [offset+1] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[1]) & 0x3ff;
2000  DSM0_TP_SUM_J3[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[2]) & 0x1ff;
2001  DSM0_TP_SUM_J1[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[3]) & 0x1ff;
2002  DSM0_TP_SUM [offset+3] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[4]) & 0x3ff;
2003  DSM0_TP_SUM [offset+4] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[5]) & 0x3ff;
2004  }
2005  }
2006 #endif
2007 
2008  //Sum TP ADC into JP's
2009  // West
2010  DSM1_JP_ADC[0]=DSM0_TP_SUM[0]+DSM0_TP_SUM[1]+DSM0_TP_SUM_J3[2];
2011  DSM1_JP_ADC[1]=DSM0_TP_SUM[3]+DSM0_TP_SUM[4]+DSM0_TP_SUM_J1[2];
2012  DSM1_JP_ADC[2]=DSM0_TP_SUM[5]+DSM0_TP_SUM[6]+DSM0_TP_SUM_J3[7];
2013  DSM1_JP_ADC[3]=DSM0_TP_SUM[8]+DSM0_TP_SUM[9]+DSM0_TP_SUM_J1[7];
2014  DSM1_JP_ADC[4]=DSM0_TP_SUM[10]+DSM0_TP_SUM[11]+DSM0_TP_SUM_J3[12];
2015  DSM1_JP_ADC[5]=DSM0_TP_SUM[13]+DSM0_TP_SUM[14]+DSM0_TP_SUM_J1[12];
2016 
2017  // East
2018  DSM1_JP_ADC[6]=DSM0_TP_SUM[15]+DSM0_TP_SUM[16]+DSM0_TP_SUM_J1[17];
2019  DSM1_JP_ADC[7]=DSM0_TP_SUM[18]+DSM0_TP_SUM[19]+DSM0_TP_SUM_J3[17];
2020  DSM1_JP_ADC[8]=DSM0_TP_SUM[20]+DSM0_TP_SUM[21]+DSM0_TP_SUM_J1[22];
2021  DSM1_JP_ADC[9]=DSM0_TP_SUM[23]+DSM0_TP_SUM[24]+DSM0_TP_SUM_J3[22];
2022  DSM1_JP_ADC[10]=DSM0_TP_SUM[25]+DSM0_TP_SUM[26]+DSM0_TP_SUM_J1[27];
2023  DSM1_JP_ADC[11]=DSM0_TP_SUM[28]+DSM0_TP_SUM[29]+DSM0_TP_SUM_J3[27];
2024 
2025  for (int hh=0;hh<12;hh++) JP_adc_holder[hh]=DSM1_JP_ADC[hh];
2026 
2027  //Test each JP and see if it passed
2028  for (int i=0;i<kNJet;i++)
2029  {
2030  DSM1_JP_jp_Bit[i]=0;
2031  if ( DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,0)) DSM1_JP_jp_Bit[i]=0;
2032  if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,0))) DSM1_JP_jp_Bit[i]=1;
2033  if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,1))) DSM1_JP_jp_Bit[i]=2;
2034  if ( DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) DSM1_JP_jp_Bit[i]=3;
2035  }
2036 
2037 
2038  int mod;
2039  //Translate JP's into 2 bits to pass to DSMLayer2
2040  for (int i=0;i<kNJet;i++){
2041  if (i < (kNJet/2)) mod = 0;
2042  else mod = 1;
2043  DSM1_ETOT_ADC[mod]+=DSM1_JP_ADC[i];
2044  if ( DSM1_JP_Bit[i/2] < DSM1_JP_jp_Bit[i]) DSM1_JP_Bit[i/2]=DSM1_JP_jp_Bit[i];
2045  }
2046 
2047 
2048  //HTTP and TP bits
2049  for (int i=0; i<kL1DsmModule; i++){
2050  for (int j=0; j<5; j++){
2051  int k= i*5 + j;
2052  int kk=i*5 + 2;
2053  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit[k]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit[k];
2054  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J3[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J3[kk];
2055  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J1[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J1[kk];
2056  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit[k]) DSM1_TP_Bit[i]=DSM0_TP_Bit[k];
2057  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J3[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J3[kk];
2058  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J1[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J1[kk];
2059  }
2060 
2061  if (DSM1_HTTP_Bit[i]>=2) DSM1_HTTP_Bit[i]=1;
2062  else if (DSM1_HTTP_Bit[i]<2) DSM1_HTTP_Bit[i]=0;
2063 
2064  if (DSM1_TP_Bit[i]>=2) DSM1_TP_Bit[i]=1;
2065  else if (DSM1_TP_Bit[i]<2) DSM1_TP_Bit[i]=0;
2066  }
2067 
2068 
2069  //WEST HT bits
2070  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[0]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[0];
2071  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[1]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[1];
2072  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit_J3[2]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit_J3[2];
2073  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit_J1[2]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit_J1[2];
2074  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[3]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[3];
2075  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[4]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[4];
2076 
2077  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[5]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[5];
2078  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[6]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[6];
2079  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit_J3[7]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit_J3[7];
2080  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit_J1[7]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit_J1[7];
2081  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[8]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[8];
2082  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[9]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[9];
2083 
2084  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[10]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[10];
2085  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[11]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[11];
2086  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit_J3[12]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit_J3[12];
2087  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit_J1[12]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit_J1[12];
2088  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[13]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[13];
2089  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[14]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[14];
2090 
2091  //EAST HT bits
2092  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[15]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[15];
2093  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[16]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[16];
2094  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit_J1[17]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit_J1[17];
2095  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit_J3[17]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit_J3[17];
2096  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[18]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[18];
2097  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[19]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[19];
2098 
2099  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[20]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[20];
2100  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[21]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[21];
2101  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit_J1[22]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit_J1[22];
2102  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit_J3[22]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit_J3[22];
2103  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[23]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[23];
2104  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[24]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[24];
2105 
2106  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[25]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[25];
2107  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[26]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[26];
2108  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit_J1[27]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit_J1[27];
2109  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit_J3[27]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit_J3[27];
2110  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[28]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[28];
2111  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[29]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[29];
2112 
2113 
2114 
2115 
2116 
2117  //Drop two lowest bits for ETOT and OR Bits>6 with 6
2118  for (int i=0;i<kL1DsmModule;i++) {
2119  DSM1_ETOT_ADC[i]/=4;
2120  if (DSM1_ETOT_ADC[i]>31) DSM1_ETOT_ADC[i]=31;
2121  }
2122 
2123 
2124 #ifdef DEBUG
2125 
2126  if (mHeadMaker->GetDataSet("MuDst")) {
2127  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2128  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
2129  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
2130  for (int dsm = 0; dsm < kL2DsmModule; ++dsm) {
2131  for (int ch = 0; ch < 6; ++ch) {
2132  int idx = dsm_read_map[ch];
2133  int TrigBankOut = emcTrig.emcLayer2(idx);
2134  int jetPatch = 2 * TriggerBankToSimuMap[ch];
2135  int sum = DSM1_JP_ADC[jetPatch] + DSM1_JP_ADC[jetPatch+1];
2136  sum = (sum >> 7) ? 31 : (sum >> 2 & 0x1f);
2137  int diff = (TrigBankOut & 0x1f) - (sum & 0x1f);
2138  mBEMCLayer2PatchSum->Fill(ch, TrigBankOut & 0x1f);
2139  mBEMCLayer2PatchSumDiff->Fill(ch, diff);
2140  diff = (TrigBankOut >> 7 & 0x1) - (DSM1_HTTP_Bit[TriggerBankToSimuMap[ch]]);
2141  mBEMCLayer2HTTPBits->Fill(ch, TrigBankOut >> 7 & 0x1);
2142  mBEMCLayer2HTTPBitsDiff->Fill(ch,diff);
2143  diff = (TrigBankOut >> 9 & 0x1) - (DSM1_TP_Bit[TriggerBankToSimuMap[ch]]);
2144  mBEMCLayer2TPBits->Fill(ch, TrigBankOut >> 9 & 0x1);
2145  mBEMCLayer2TPBitsDiff->Fill(ch,diff);
2146  diff = (TrigBankOut >> 10 & 0x3) - (DSM1_JP_Bit[TriggerBankToSimuMap[ch]]);
2147  mBEMCLayer2JPBits->Fill(ch, TrigBankOut >> 10 & 0x3);
2148  mBEMCLayer2JPBitsDiff->Fill(ch, diff);
2149  diff = (TrigBankOut >> 12 & 0x3) - (DSM1_HTj0_Bit[TriggerBankToSimuMap[ch]]);
2150  mBEMCLayer2HTj0Bits->Fill(ch, TrigBankOut >> 12 & 0x3);
2151  mBEMCLayer2HTj0BitsDiff->Fill(ch,diff);
2152  diff = (TrigBankOut >> 14 & 0x3) - (DSM1_HTj1_Bit[TriggerBankToSimuMap[ch]]);
2153  mBEMCLayer2HTj1Bits->Fill(ch, TrigBankOut >> 14 & 0x3);
2154  mBEMCLayer2HTj1BitsDiff->Fill(ch,diff);
2155 
2156  }
2157  }
2158  }
2159 #endif
2160 
2161 }
2162 
2163 void StBemcTriggerSimu::get2007_DSMLayer2()
2164 {
2165 
2166  // In hardware the final trigger decisions are made in the TCU
2167  // It is not possible to compare the emulator with the TCU input
2168  // so all final trigger decisions for the BEMC are made at Layer2
2169  // in this code
2170 
2171  Int_t DSM2_JP_Bit=0;
2172  Int_t DSM2_HT_Bit=0;
2173  Int_t DSM2_HTTP_Bit=0;
2174  Int_t DSM2_TP_Bit=0;
2175 
2176 
2177  for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
2178 
2179  if (DSM2_JP_Bit<DSM1_JP_Bit[dsm]) DSM2_JP_Bit=DSM1_JP_Bit[dsm];
2180  if (DSM2_HTTP_Bit<DSM1_HTTP_Bit[dsm]) DSM2_HTTP_Bit=DSM1_HTTP_Bit[dsm];
2181  if (DSM2_HT_Bit<DSM1_HTj0_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj0_Bit[dsm];
2182  if (DSM2_HT_Bit<DSM1_HTj1_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj1_Bit[dsm];
2183  if (DSM2_TP_Bit<DSM1_TP_Bit[dsm]) DSM2_TP_Bit=DSM1_TP_Bit[dsm];
2184  }
2185 
2186  //HT
2187  if (DSM2_HT_Bit > 1){
2188  mFiredTriggers.push_back(200601);
2189  mFiredTriggers.push_back(200602);
2190  mFiredTriggers.push_back(200213);
2191  mFiredTriggers.push_back(200214);
2192 
2193  }
2194 
2195  if (DSM2_HT_Bit > 2){
2196  mFiredTriggers.push_back(200211);
2197  mFiredTriggers.push_back(200212);
2198  mFiredTriggers.push_back(200220);
2199  mFiredTriggers.push_back(200221);
2200  mFiredTriggers.push_back(200222);
2201  mFiredTriggers.push_back(200620);
2202  mFiredTriggers.push_back(200621);
2203  }
2204 
2205 }
2206 
2207 
2208 
2209 //==================================================
2210 //==================================================
2211 void StBemcTriggerSimu::get2008dAu_DSMLayer0() {
2212 
2213  //0-(8)9 Unused
2214  //10-11 First 2 HT threshold bits encoded into 2 bits
2215  //12 High Tower bit for threshold 3
2216  //13 Masked high tower bit for threshold 4
2217  //14-15 Unused
2218 
2219  //Loop over modules
2220  int k=0;
2221  int DSM_TP[kL0DsmInputs];
2222  for (int i=0;i<kL0DsmModule;i++){
2223 
2224  //Zero out 16 bit L0 HT outputs for each module
2225  DSM0_HT_Bit[i]=0;
2226  DSM0_HT_2Bit[i]=0;
2227  DSM0_HT_Thr3_Bit[i]=0;
2228  DSM0_HT_Masked_Bit[i]=0;
2229  DSM0_HT_Bit_J1[i]=0;
2230  DSM0_HT_2Bit_J1[i]=0;
2231  DSM0_HT_Thr3_Bit_J1[i]=0;
2232  DSM0_HT_Masked_Bit_J1[i]=0;
2233  DSM0_HT_Bit_J3[i]=0;
2234  DSM0_HT_2Bit_J3[i]=0;
2235  DSM0_HT_Thr3_Bit_J3[i]=0;
2236  DSM0_HT_Masked_Bit_J3[i]=0;
2237 
2238  //Zero out 16 bit L0 TP/HT/HTTP outputs for each L0 input
2239  for (int j=0;j<kL0DsmInputs;j++){
2240  DSM0_HT_tp_Bit[j]=0;
2241  DSM0_HT_tp_Bit_J1[j]=0;
2242  DSM0_HT_tp_Bit_J3[j]=0;
2243  }
2244 
2245  //Get array of TPid# from DSM module#
2246  mDecoder->GetTriggerPatchesFromDSM(i,DSM_TP);
2247 
2248 #ifdef DEBUG
2249  // Overwrite input to BEMC layer 0 DSMs (output of BEMC FEEs)
2250  // with content of trigger bank from MuDst (data only).
2251  // First fill the Layer0 histograms with results from FEEout()
2252  if (mHeadMaker->GetDataSet("MuDst")) {
2253  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2254  for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
2255  mBEMCLayer0HT6bit->Fill(triggerPatch,emcTrig.highTower(triggerPatch));
2256  mBEMCLayer0TP6bit->Fill(triggerPatch,emcTrig.patch(triggerPatch));
2257  mBEMCLayer0HT6bitDiff->Fill(triggerPatch,emcTrig.highTower(triggerPatch)-L0_HT_ADC[triggerPatch]);
2258  mBEMCLayer0TP6bitDiff->Fill(triggerPatch,emcTrig.patch(triggerPatch)-L0_TP_ADC[triggerPatch]);
2259  L0_HT_ADC[triggerPatch] = emcTrig.highTower(triggerPatch);
2260  L0_TP_ADC[triggerPatch] = emcTrig.patch(triggerPatch);
2261  }
2262  }
2263 #endif
2264 
2265 
2266  //Loop over 10 inputs to each module
2267  for (int j=0;j<kL0DsmInputs;j++){
2268 
2269  int tpid=DSM_TP[j];
2270  int jpid=-1;
2271  int seq=-1;
2272  mDecoder->GetJetPatchAndSequenceFromTriggerPatch(tpid, jpid, seq);
2273 
2274  //Skip modules 2,7,12,17,22,27
2275  if (i%5!=2) {
2276 
2277  //apply 5 HT thresholds to each HT adc in each TP
2278  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit[j]=0;
2279  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit[j]=1;
2280  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit[j]=2;
2281  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit[j]=3;
2282  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3))) DSM0_HT_tp_Bit[j]=4;
2283  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) DSM0_HT_tp_Bit[j]=5;
2284 
2285  //if all 6 bits are high then input is ignored
2286  if (L0_HT_ADC[tpid]==63) DSM0_HT_tp_Bit[j]=0;
2287 
2288  //Or threshold bits for all 10 high-towers
2289  if (DSM0_HT_Bit[i]< DSM0_HT_tp_Bit[j]) DSM0_HT_Bit[i]=DSM0_HT_tp_Bit[j];
2290 
2291  }
2292 
2293  //Loop over 2x5 inputs(TP) for modules 2,7,12,17,22,29
2294  if (i%5==2){
2295 
2296  if (j%2)
2297  {
2298  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J3[j]=0;
2299  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J3[j]=1;
2300  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J3[j]=2;
2301  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit_J3[j]=3;
2302  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3))) DSM0_HT_tp_Bit_J3[j]=4;
2303  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) DSM0_HT_tp_Bit_J3[j]=5;
2304  }
2305  else
2306  {
2307  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J1[j]=0;
2308  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J1[j]=1;
2309  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J1[j]=2;
2310  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit_J1[j]=3;
2311  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3))) DSM0_HT_tp_Bit_J1[j]=4;
2312  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,4)) DSM0_HT_tp_Bit_J1[j]=5;
2313  }
2314 
2315  //if all 6 bits are high then input is ignored
2316  if (L0_HT_ADC[tpid]==63) DSM0_HT_tp_Bit_J1[j]=0;
2317  if (L0_HT_ADC[tpid]==63) DSM0_HT_tp_Bit_J3[j]=0;
2318 
2319  //Or threshold bits for all 10 high-towers
2320  if (DSM0_HT_Bit_J1[i]< DSM0_HT_tp_Bit_J1[j]) DSM0_HT_Bit_J1[i]=DSM0_HT_tp_Bit_J1[j];
2321  if (DSM0_HT_Bit_J3[i]< DSM0_HT_tp_Bit_J3[j]) DSM0_HT_Bit_J3[i]=DSM0_HT_tp_Bit_J3[j];
2322  }
2323  }
2324 
2325 
2326  //Code first three thresholds (0-2) into 2 bits
2327  DSM0_HT_2Bit[i]=DSM0_HT_Bit[i];
2328  DSM0_HT_2Bit_J1[i]=DSM0_HT_Bit_J1[i];
2329  DSM0_HT_2Bit_J3[i]=DSM0_HT_Bit_J3[i];
2330  if (DSM0_HT_Bit[i]>3) DSM0_HT_2Bit[i]=3;
2331  if (DSM0_HT_Bit_J1[i]>3) DSM0_HT_2Bit_J1[i]=3;
2332  if (DSM0_HT_Bit_J3[i]>3) DSM0_HT_2Bit_J3[i]=3;
2333 
2334  //HT bit for threshold 3
2335  if (DSM0_HT_Bit[i]>=4) DSM0_HT_Thr3_Bit[i]=1;
2336  if (DSM0_HT_Bit_J1[i]>=4) DSM0_HT_Thr3_Bit_J1[i]=1;
2337  if (DSM0_HT_Bit_J3[i]>=4) DSM0_HT_Thr3_Bit_J3[i]=1;
2338 
2339  //Or between highest threshold and R5
2340  if (DSM0_HT_Bit[i]==5) DSM0_HT_Masked_Bit[i]=1;
2341  if (DSM0_HT_Bit_J1[i]==5) DSM0_HT_Masked_Bit_J1[i]=1;
2342  if (DSM0_HT_Bit_J3[i]==5) DSM0_HT_Masked_Bit_J3[i]=1;
2343 
2344  if (i%5!=2)
2345  {
2346  L0_16bit_Out[k]=0;
2347  L0_16bit_Out[k++]=(DSM0_HT_2Bit[i]<<10)+(DSM0_HT_Thr3_Bit[i]<<12)+(DSM0_HT_Masked_Bit[i]<<13);
2348  }
2349  if (i%5==2)
2350  {
2351  L0_16bit_Out[k]=0;
2352  L0_16bit_Out[k++]=(DSM0_HT_2Bit_J3[i]<<10)+(DSM0_HT_Thr3_Bit_J3[i]<<12)+(DSM0_HT_Masked_Bit_J3[i]<<13);
2353  L0_16bit_Out[k++]=(DSM0_HT_2Bit_J1[i]<<10)+(DSM0_HT_Thr3_Bit_J1[i]<<12)+(DSM0_HT_Masked_Bit_J1[i]<<13);
2354  }
2355 
2356  }
2357 
2358 #ifdef DEBUG
2359 
2360  // Fill diagnostic histograms
2361  if (mHeadMaker->GetDataSet("MuDst")) {
2362  // BEMC layer 1 DSMs are stored in this order in the trigger bank:
2363  // BE101, BE102, BE103, BW101, BW102, BW103
2364  // DSM channels are read out in this order:
2365  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
2366  // Trigger bank <-> Emulator ==> 0, 1, 2, 3, 4, 5 <-> 3, 4, 5, 0, 1, 2
2367  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
2368  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2369 
2370  // Loop over BEMC layer 1 DSMs
2371  for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
2372  // Loop over layer 1 input channels
2373  for (int ch = 0; ch < kL1DsmInputs; ++ch) {
2374 
2375  Int_t idx = dsm*8+dsm_read_map[ch];
2376  Int_t TrigBankOut = emcTrig.bemcLayer1(idx);
2377  Int_t HTout = (TrigBankOut & 0xc00)/0x400;
2378  Int_t HTbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc00)/0x400;
2379  Int_t HTthr3out = (TrigBankOut & 0x1000)/0x1000;
2380  Int_t HTthr3bit = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x1000)/0x1000;
2381  Int_t HTmaskout = (TrigBankOut & 0x2000)/0x2000;
2382  Int_t HTmaskbit = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x2000)/0x2000;
2383  int HTdiff = (HTbits) - (HTout);
2384  int HTthr3diff = (HTthr3out) - (HTthr3bit);
2385  int HTmaskdiff = (HTmaskout) - (HTmaskbit);
2386  mBEMCLayer1HTBits->Fill(dsm*6+ch, HTout);
2387  mBEMCLayer1HTthr3Bits->Fill(dsm*6+ch, HTthr3out);
2388  mBEMCLayer1HTmaskBits->Fill(dsm*6+ch, HTmaskout);
2389  mBEMCLayer1HTBitsDiff->Fill(dsm*6+ch, HTdiff);
2390  mBEMCLayer1HTthr3Diff->Fill(dsm*6+ch, HTthr3diff);
2391  mBEMCLayer1HTmaskDiff->Fill(dsm*6+ch, HTmaskdiff);
2392  }
2393  }
2394  }
2395 #endif
2396 
2397 
2398 }
2399 
2400 
2401 //==================================================
2402 //==================================================
2403 void StBemcTriggerSimu::get2008dAu_DSMLayer1(){
2404 
2405  //DSM_Layer0 is passed to DSM_Layer1 in 8 UShort blocks (16 bits)
2406  //There are 6 DSM_Layer1 boards and each can take 120 bits total
2407  //So DSM_Layer0 passes 8 shorts (16*8=128) or 128 bits to each DSM_Layer1
2408 
2409  //Zero out the DSMLayer1 Bits passed to DSMLayer2
2410  for (int i=0;i<kL1DsmModule;i++){
2411  DSM1_HTj0_Bit[i]=0;
2412  DSM1_HTj1_Bit[i]=0;
2413  }
2414 
2415 
2416 #ifdef DEBUG
2417  // Overwrite input to BEMC layer 1 DSMs (output of BEMC layer 0 DSMs)
2418  // with content of trigger bank from MuDst (data only).
2419  if (mHeadMaker->GetDataSet("MuDst")) {
2420  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
2421  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
2422  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2423  for (int dsm = 0; dsm < 6; ++dsm) {
2424  int offset = TriggerBankToSimuMap[dsm]*5;
2425  DSM0_TP_SUM [offset+0] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[0]) & 0x3ff;
2426  DSM0_TP_SUM [offset+1] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[1]) & 0x3ff;
2427  DSM0_TP_SUM_J3[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[2]) & 0x1ff;
2428  DSM0_TP_SUM_J1[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[3]) & 0x1ff;
2429  DSM0_TP_SUM [offset+3] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[4]) & 0x3ff;
2430  DSM0_TP_SUM [offset+4] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[5]) & 0x3ff;
2431  }
2432  }
2433 #endif
2434 
2435 
2436  //WEST HT bits
2437  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[0]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[0];
2438  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[1]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[1];
2439  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit_J3[2]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit_J3[2];
2440  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit_J1[2]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit_J1[2];
2441  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[3]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[3];
2442  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[4]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[4];
2443 
2444  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[5]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[5];
2445  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[6]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[6];
2446  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit_J3[7]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit_J3[7];
2447  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit_J1[7]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit_J1[7];
2448  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[8]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[8];
2449  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[9]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[9];
2450 
2451  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[10]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[10];
2452  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[11]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[11];
2453  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit_J3[12]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit_J3[12];
2454  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit_J1[12]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit_J1[12];
2455  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[13]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[13];
2456  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[14]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[14];
2457 
2458  //EAST HT bits
2459  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[15]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[15];
2460  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[16]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[16];
2461  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit_J1[17]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit_J1[17];
2462  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit_J3[17]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit_J3[17];
2463  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[18]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[18];
2464  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[19]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[19];
2465 
2466  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[20]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[20];
2467  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[21]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[21];
2468  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit_J1[22]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit_J1[22];
2469  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit_J3[22]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit_J3[22];
2470  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[23]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[23];
2471  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[24]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[24];
2472 
2473  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[25]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[25];
2474  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[26]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[26];
2475  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit_J1[27]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit_J1[27];
2476  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit_J3[27]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit_J3[27];
2477  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[28]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[28];
2478  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[29]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[29];
2479 
2480 
2481 #ifdef DEBUG
2482 
2483  if (mHeadMaker->GetDataSet("MuDst")) {
2484  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2485  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
2486  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
2487  for (int dsm = 0; dsm < kL2DsmModule; ++dsm) {
2488  for (int ch = 0; ch < 6; ++ch) {
2489  int idx = dsm_read_map[ch];
2490  int TrigBankOut = emcTrig.emcLayer2(idx);
2491  int jetPatch = 2 * TriggerBankToSimuMap[ch];
2492  int sum = DSM1_JP_ADC[jetPatch] + DSM1_JP_ADC[jetPatch+1];
2493  sum = (sum >> 7) ? 31 : (sum >> 2 & 0x1f);
2494  int diff = (TrigBankOut & 0x1f) - (sum & 0x1f);
2495  mBEMCLayer2PatchSum->Fill(ch, TrigBankOut & 0x1f);
2496  mBEMCLayer2PatchSumDiff->Fill(ch, diff);
2497  diff = (TrigBankOut >> 7 & 0x1) - (DSM1_HTTP_Bit[TriggerBankToSimuMap[ch]]);
2498  mBEMCLayer2HTTPBits->Fill(ch, TrigBankOut >> 7 & 0x1);
2499  mBEMCLayer2HTTPBitsDiff->Fill(ch,diff);
2500  diff = (TrigBankOut >> 9 & 0x1) - (DSM1_TP_Bit[TriggerBankToSimuMap[ch]]);
2501  mBEMCLayer2TPBits->Fill(ch, TrigBankOut >> 9 & 0x1);
2502  mBEMCLayer2TPBitsDiff->Fill(ch,diff);
2503  diff = (TrigBankOut >> 10 & 0x3) - (DSM1_JP_Bit[TriggerBankToSimuMap[ch]]);
2504  mBEMCLayer2JPBits->Fill(ch, TrigBankOut >> 10 & 0x3);
2505  mBEMCLayer2JPBitsDiff->Fill(ch, diff);
2506  diff = (TrigBankOut >> 12 & 0x3) - (DSM1_HTj0_Bit[TriggerBankToSimuMap[ch]]);
2507  mBEMCLayer2HTj0Bits->Fill(ch, TrigBankOut >> 12 & 0x3);
2508  mBEMCLayer2HTj0BitsDiff->Fill(ch,diff);
2509  diff = (TrigBankOut >> 14 & 0x3) - (DSM1_HTj1_Bit[TriggerBankToSimuMap[ch]]);
2510  mBEMCLayer2HTj1Bits->Fill(ch, TrigBankOut >> 14 & 0x3);
2511  mBEMCLayer2HTj1BitsDiff->Fill(ch,diff);
2512 
2513  }
2514  }
2515  }
2516 #endif
2517 
2518 }
2519 
2520 //==================================================
2521 //==================================================
2522 void StBemcTriggerSimu::get2008dAu_DSMLayer2(){
2523 
2524  // In hardware the final trigger decisions are made in the TCU
2525  // It is not possible to compare the emulator with the TCU input
2526  // so all final trigger decisions for the BEMC are made at Layer2
2527  // in this code
2528 
2529  Int_t DSM2_HT_Bit=0;
2530 
2531  for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
2532  if (DSM2_HT_Bit<DSM1_HTj0_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj0_Bit[dsm];
2533  if (DSM2_HT_Bit<DSM1_HTj1_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj1_Bit[dsm];
2534  }
2535 
2536  //HT0
2537  if (DSM2_HT_Bit > 0){
2538  mFiredTriggers.push_back(210500);
2539  mFiredTriggers.push_back(210501);
2540  }
2541  //HT1
2542  if (DSM2_HT_Bit > 1){
2543  mFiredTriggers.push_back(210510);
2544  mFiredTriggers.push_back(210511);
2545  }
2546  //HT2
2547  if (DSM2_HT_Bit > 2){
2548  mFiredTriggers.push_back(210520);
2549  mFiredTriggers.push_back(210521);
2550  }
2551  //HT4
2552  if (DSM2_HT_Bit > 4){
2553  mFiredTriggers.push_back(210541);
2554  }
2555 
2556 }
2557 
2558 
2559 //==================================================
2560 //==================================================
2561 void StBemcTriggerSimu::get2008pp_DSMLayer0() {
2562 
2563  //0-(8)9 ADC sum Trigger Patches
2564  //10-11 HT threshold bits
2565  //12-13 TP threshold bits
2566  //14-15 HT&&TP threshold bits
2567 
2568  //Loop over modules
2569  int k=0;
2570  int DSM_TP[kL0DsmInputs];
2571  for (int i=0;i<kL0DsmModule;i++){
2572 
2573  //Zero out 16 bit L0 TP/HT/HTTP outputs for each module
2574  DSM0_TP_SUM[i]=0;
2575  DSM0_HT_Thr3_Bit[i]=0;
2576  DSM0_HT_Bit[i]=0;
2577  DSM0_TP_Bit[i]=0;
2578  DSM0_HTTP_Bit[i]=0;
2579 
2580  DSM0_TP_SUM_J1[i]=0;
2581  DSM0_HT_Thr3_Bit_J1[i]=0;
2582  DSM0_HT_Bit_J1[i]=0;
2583  DSM0_TP_Bit_J1[i]=0;
2584  DSM0_HTTP_Bit_J1[i]=0;
2585 
2586  DSM0_TP_SUM_J3[i]=0;
2587  DSM0_HT_Thr3_Bit_J3[i]=0;
2588  DSM0_HT_Bit_J3[i]=0;
2589  DSM0_TP_Bit_J3[i]=0;
2590  DSM0_HTTP_Bit_J3[i]=0;
2591 
2592 
2593  //Zero out 16 bit L0 TP/HT/HTTP outputs for each L0 input
2594  for (int j=0;j<kL0DsmInputs;j++){
2595  DSM0_HT_tp_Bit[j]=0;
2596  DSM0_HT_Thr3_tp_Bit[j]=0;
2597  DSM0_TP_tp_Bit[j]=0;
2598  DSM0_HTTP_tp_Bit[j]=0;
2599  DSM0_HT_tp_Bit_J1[j]=0;
2600  DSM0_HT_Thr3_tp_Bit_J1[j]=0;
2601  DSM0_TP_tp_Bit_J1[j]=0;
2602  DSM0_HTTP_tp_Bit_J1[j]=0;
2603  DSM0_HT_tp_Bit_J3[j]=0;
2604  DSM0_HT_Thr3_tp_Bit_J3[j]=0;
2605  DSM0_TP_tp_Bit_J3[j]=0;
2606  DSM0_HTTP_tp_Bit_J3[j]=0;
2607  }
2608 
2609  //Get array of TPid# from DSM module#
2610  mDecoder->GetTriggerPatchesFromDSM(i,DSM_TP);
2611 
2612 #ifdef DEBUG
2613  // Overwrite input to BEMC layer 0 DSMs (output of BEMC FEEs)
2614  // with content of trigger bank from MuDst (data only).
2615  // First fill the Layer0 histograms with results from FEEout()
2616  if (mHeadMaker->GetDataSet("MuDst")) {
2617  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2618  for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
2619  mBEMCLayer0HT6bit->Fill(triggerPatch,emcTrig.highTower(triggerPatch));
2620  mBEMCLayer0TP6bit->Fill(triggerPatch,emcTrig.patch(triggerPatch));
2621  mBEMCLayer0HT6bitDiff->Fill(triggerPatch,emcTrig.highTower(triggerPatch)-L0_HT_ADC[triggerPatch]);
2622  mBEMCLayer0TP6bitDiff->Fill(triggerPatch,emcTrig.patch(triggerPatch)-L0_TP_ADC[triggerPatch]);
2623  L0_HT_ADC[triggerPatch] = emcTrig.highTower(triggerPatch);
2624  L0_TP_ADC[triggerPatch] = emcTrig.patch(triggerPatch);
2625  }
2626  }
2627 #endif
2628 
2629 
2630  //Loop over 10 inputs to each module
2631  for (int j=0;j<kL0DsmInputs;j++){
2632 
2633  int tpid=DSM_TP[j];
2634  int jpid=-1;
2635  int seq=-1;
2636  mDecoder->GetJetPatchAndSequenceFromTriggerPatch(tpid, jpid, seq);
2637 
2638  //Skip modules 2,7,12,17,22,27
2639  if (i%5!=2) {
2640 
2641  //apply HT thresholds to each HT adc in each TP
2642  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit[j]=0;
2643  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit[j]=1;
2644  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit[j]=2;
2645  if ((L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit[j]=3;
2646  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) DSM0_HT_Thr3_tp_Bit[j]=1;
2647  if ( L0_HT_ADC[tpid]==63 ) DSM0_HT_tp_Bit[j]=0;
2648 
2649  //apply TP threshold to each TP adc in each TP
2650  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit[j]=0;
2651  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit[j]=1;
2652  if ( L0_TP_ADC[tpid]==63 ) DSM0_TP_tp_Bit[j]=0;
2653 
2654  //add up TP adc for 2/5 of JP
2655  DSM0_TP_SUM[i]+=L0_TP_ADC[tpid];
2656 
2657  // AND HT#3 with TP bit
2658  DSM0_HTTP_tp_Bit[j]=(DSM0_TP_tp_Bit[j]&&DSM0_HT_Thr3_tp_Bit[j]);
2659  // Set HT#3 bit
2660  if (DSM0_HT_Thr3_Bit[i]<DSM0_HT_Thr3_tp_Bit[j]) DSM0_HT_Thr3_Bit[i]=DSM0_HT_Thr3_tp_Bit[j];
2661  // OR bits for HT thresholds #0,#1,#2
2662  if (DSM0_HT_Bit[i]<DSM0_HT_tp_Bit[j]) DSM0_HT_Bit[i]=DSM0_HT_tp_Bit[j];
2663  // OR bits for TP for all trigger patches
2664  if (DSM0_TP_Bit[i]<DSM0_TP_tp_Bit[j]) DSM0_TP_Bit[i]=DSM0_TP_tp_Bit[j];
2665  //OR bits for HTTP for all trigger patches
2666  if (DSM0_HTTP_Bit[i]<DSM0_HTTP_tp_Bit[j]) DSM0_HTTP_Bit[i]=DSM0_HTTP_tp_Bit[j];
2667  }
2668 
2669  //Loop over 2x5 inputs(TP) for modules 2,7,12,17,22,29
2670  if (i%5==2){
2671 
2672  if (j%2)
2673  {
2674  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J3[j]=0;
2675  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J3[j]=1;
2676  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J3[j]=2;
2677  if ((L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit_J3[j]=3;
2678  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) DSM0_HT_Thr3_tp_Bit_J3[j]=1;
2679  if ( L0_HT_ADC[tpid]==63 ) DSM0_HT_tp_Bit_J3[j]=0;
2680  }
2681  else
2682  {
2683  if ( L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,0)) DSM0_HT_tp_Bit_J1[j]=0;
2684  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,1)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,0))) DSM0_HT_tp_Bit_J1[j]=1;
2685  if ((L0_HT_ADC[tpid] <= mDbThres->GetHT_DSM0_threshold(i,timestamp,2)) && (L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,1))) DSM0_HT_tp_Bit_J1[j]=2;
2686  if ((L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,2))) DSM0_HT_tp_Bit_J1[j]=3;
2687  if ( L0_HT_ADC[tpid] > mDbThres->GetHT_DSM0_threshold(i,timestamp,3)) DSM0_HT_Thr3_tp_Bit_J1[j]=1;
2688  if ( L0_HT_ADC[tpid]==63 ) DSM0_HT_tp_Bit_J1[j]=0;
2689  }
2690 
2691  //apply TP thresholds to each TP adc in each TP
2692  if (j%2)
2693  {
2694  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J3[j]=0;
2695  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J3[j]=1;
2696  if ( L0_TP_ADC[tpid] == 63 ) DSM0_TP_tp_Bit_J3[j]=0;
2697  }
2698  else
2699  {
2700  if ( L0_TP_ADC[tpid] <= mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J1[j]=0;
2701  if ( L0_TP_ADC[tpid] > mDbThres->GetTP_DSM0_threshold(i,timestamp,0)) DSM0_TP_tp_Bit_J1[j]=1;
2702  if ( L0_TP_ADC[tpid] == 63 ) DSM0_TP_tp_Bit_J1[j]=0;
2703  }
2704 
2705  //add up TP adc for 1/5 of JP
2706  if (j%2)
2707  DSM0_TP_SUM_J3[i]+=L0_TP_ADC[tpid];
2708  else
2709  DSM0_TP_SUM_J1[i]+=L0_TP_ADC[tpid];
2710 
2711 
2712  //AND HT#3 with TP bit
2713  if (j%2)
2714  {
2715  DSM0_HTTP_tp_Bit_J3[j]=(DSM0_TP_tp_Bit_J3[j] && DSM0_HT_Thr3_tp_Bit_J3[j]);
2716  }
2717  else
2718  {
2719  DSM0_HTTP_tp_Bit_J1[j]=(DSM0_TP_tp_Bit_J1[j] && DSM0_HT_Thr3_tp_Bit_J1[j]);
2720  }
2721 
2722  // OR bits for HT, TP, and HTTP for all trigger patches
2723  if (DSM0_HT_Bit_J3[i]<DSM0_HT_tp_Bit_J3[j]) DSM0_HT_Bit_J3[i]=DSM0_HT_tp_Bit_J3[j];
2724  if (DSM0_TP_Bit_J3[i]<DSM0_TP_tp_Bit_J3[j]) DSM0_TP_Bit_J3[i]=DSM0_TP_tp_Bit_J3[j];
2725  if (DSM0_HTTP_Bit_J3[i]<DSM0_HTTP_tp_Bit_J3[j]) DSM0_HTTP_Bit_J3[i]=DSM0_HTTP_tp_Bit_J3[j];
2726  if (DSM0_HT_Thr3_Bit_J3[i]<DSM0_HT_Thr3_tp_Bit_J3[j]) DSM0_HT_Thr3_Bit_J3[i]=DSM0_HT_Thr3_tp_Bit_J3[j];
2727 
2728  if (DSM0_HT_Bit_J1[i]<DSM0_HT_tp_Bit_J1[j]) DSM0_HT_Bit_J1[i]=DSM0_HT_tp_Bit_J1[j];
2729  if (DSM0_TP_Bit_J1[i]<DSM0_TP_tp_Bit_J1[j]) DSM0_TP_Bit_J1[i]=DSM0_TP_tp_Bit_J1[j];
2730  if (DSM0_HTTP_Bit_J1[i]<DSM0_HTTP_tp_Bit_J1[j]) DSM0_HTTP_Bit_J1[i]=DSM0_HTTP_tp_Bit_J1[j];
2731  if (DSM0_HT_Thr3_Bit_J1[i]<DSM0_HT_Thr3_tp_Bit_J1[j]) DSM0_HT_Thr3_Bit_J1[i]=DSM0_HT_Thr3_tp_Bit_J1[j];
2732 
2733  }
2734  }
2735 
2736 
2737  if (i%5!=2)
2738  {
2739  L0_16bit_Out[k]=0;
2740  L0_16bit_Out[k++]=DSM0_TP_SUM[i]+(DSM0_HT_Bit[i]<<10)+(DSM0_HT_Thr3_Bit[i]<<12)+(DSM0_TP_Bit[i]<<13)+(DSM0_HTTP_Bit[i]<<14);
2741  }
2742  if (i%5==2)
2743  {
2744  L0_16bit_Out[k]=0;
2745  L0_16bit_Out[k++]=DSM0_TP_SUM_J3[i]+(DSM0_HT_Bit_J3[i]<<10)+(DSM0_HT_Thr3_Bit_J3[i]<<12)+(DSM0_TP_Bit_J3[i]<<13)+(DSM0_HTTP_Bit_J3[i]<<14);
2746  L0_16bit_Out[k++]=DSM0_TP_SUM_J1[i]+(DSM0_HT_Bit_J1[i]<<10)+(DSM0_HT_Thr3_Bit_J1[i]<<12)+(DSM0_TP_Bit_J1[i]<<13)+(DSM0_HTTP_Bit_J1[i]<<14);
2747  }
2748  }
2749 
2750 #ifdef DEBUG
2751 
2752  // Fill diagnostic histograms
2753  if (mHeadMaker->GetDataSet("MuDst")) {
2754  // BEMC layer 1 DSMs are stored in this order in the trigger bank:
2755  // BE101, BE102, BE103, BW101, BW102, BW103
2756  // DSM channels are read out in this order:
2757  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
2758  // Trigger bank <-> Emulator ==> 0, 1, 2, 3, 4, 5 <-> 3, 4, 5, 0, 1, 2
2759  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
2760  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2761 
2762  // Loop over BEMC layer 1 DSMs
2763  for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
2764  // Loop over layer 1 input channels
2765  for (int ch = 0; ch < kL1DsmInputs; ++ch) {
2766 
2767  Int_t idx = dsm*8+dsm_read_map[ch];
2768  Int_t TrigBankOut = emcTrig.bemcLayer1(idx);
2769  //bits 0-9
2770  Int_t TPSumout = (TrigBankOut & 0x3ff);
2771  Int_t TPSumbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x3ff);
2772  //bits 10-11
2773  Int_t HTout = (TrigBankOut & 0xc00)/0x400;
2774  Int_t HTbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0xc00)/0x400;
2775  //bit 12
2776  Int_t HT3out = (TrigBankOut & 0x1000/0x800);
2777  Int_t HT3bits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x1000/0x800);
2778  //bit 13
2779  Int_t TPout = (TrigBankOut & 0x2000)/0x1000;
2780  Int_t TPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x2000)/0x1000;
2781  //bit 14
2782  Int_t HTTPout = (TrigBankOut & 0x4000)/0x2000;
2783  Int_t HTTPbits = (L0_16bit_Out[TriggerBankToSimuMap[dsm]*6+ch] & 0x4000)/0x2000;
2784 
2785  int TPSumdiff = (TPSumbits)-(TPSumout);
2786  int HTdiff = (HTbits) - (HTout);
2787  int HT3diff = (HT3bits) - (HT3out);
2788  int TPdiff = (TPbits) - (TPout);
2789  int HTTPdiff = (HTTPbits) - (HTTPout);
2790  mBEMCLayer1PatchSum->Fill(dsm*6+ch, TPSumout);
2791  mBEMCLayer1HTBits->Fill(dsm*6+ch, HTout);
2792  mBEMCLayer1HTthr3Bits->Fill(dsm*6+ch,HT3out);
2793  mBEMCLayer1TPBits->Fill(dsm*6+ch, TPout);
2794  mBEMCLayer1HTTPBits->Fill(dsm*6+ch, HTTPout);
2795  mBEMCLayer1PatchSumDiff->Fill(dsm*6+ch, TPSumdiff);
2796  mBEMCLayer1HTBitsDiff->Fill(dsm*6+ch, HTdiff);
2797  mBEMCLayer1HTthr3Diff->Fill(dsm*6+ch, HT3diff);
2798  mBEMCLayer1TPBitsDiff->Fill(dsm*6+ch, TPdiff);
2799  mBEMCLayer1HTTPBitsDiff->Fill(dsm*6+ch, HTTPdiff);
2800  }
2801  }
2802  }
2803 #endif
2804 
2805 }
2806 
2807 
2808 //==================================================
2809 //==================================================
2810 void StBemcTriggerSimu::get2008pp_DSMLayer1(){
2811 
2812 
2813  //DSM_Layer0 is passed to DSM_Layer1 in 8 UShort blocks (16 bits)
2814  //There are 6 DSM_Layer1 boards and each can take 120 bits total
2815  //So DSM_Layer0 passes 8 shorts (16*8=128) or 128 bits to each DSM_Layer1
2816 
2817  //Zero out the DSMLayer1 Bits passed to DSMLayer2
2818  for (int i=0;i<kL1DsmModule;i++){
2819  DSM1_JP_Bit[i]=0;
2820  DSM1_HTj0_Bit[i]=0;
2821  DSM1_HTj1_Bit[i]=0;
2822  DSM1_HT3_Bit[i]=0;
2823  DSM1_TP_Bit[i]=0;
2824  DSM1_HTTP_Bit[i]=0;
2825  DSM1_ETOT_ADC[i]=0;
2826  }
2827 
2828 
2829 #ifdef DEBUG
2830  // Overwrite input to BEMC layer 1 DSMs (output of BEMC layer 0 DSMs)
2831  // with content of trigger bank from MuDst (data only).
2832  if (mHeadMaker->GetDataSet("MuDst")) {
2833  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
2834  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
2835  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2836  for (int dsm = 0; dsm < 6; ++dsm) {
2837  int offset = TriggerBankToSimuMap[dsm]*5;
2838  DSM0_TP_SUM [offset+0] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[0]) & 0x3ff;
2839  DSM0_TP_SUM [offset+1] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[1]) & 0x3ff;
2840  DSM0_TP_SUM_J3[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[2]) & 0x1ff;
2841  DSM0_TP_SUM_J1[offset+2] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[3]) & 0x1ff;
2842  DSM0_TP_SUM [offset+3] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[4]) & 0x3ff;
2843  DSM0_TP_SUM [offset+4] = emcTrig.bemcLayer1(dsm*8+dsm_read_map[5]) & 0x3ff;
2844  }
2845  }
2846 #endif
2847 
2848  //Sum TP ADC into JP's
2849  // West
2850  DSM1_JP_ADC[0]=DSM0_TP_SUM[0]+DSM0_TP_SUM[1]+DSM0_TP_SUM_J3[2];
2851  DSM1_JP_ADC[1]=DSM0_TP_SUM[3]+DSM0_TP_SUM[4]+DSM0_TP_SUM_J1[2];
2852  DSM1_JP_ADC[2]=DSM0_TP_SUM[5]+DSM0_TP_SUM[6]+DSM0_TP_SUM_J3[7];
2853  DSM1_JP_ADC[3]=DSM0_TP_SUM[8]+DSM0_TP_SUM[9]+DSM0_TP_SUM_J1[7];
2854  DSM1_JP_ADC[4]=DSM0_TP_SUM[10]+DSM0_TP_SUM[11]+DSM0_TP_SUM_J3[12];
2855  DSM1_JP_ADC[5]=DSM0_TP_SUM[13]+DSM0_TP_SUM[14]+DSM0_TP_SUM_J1[12];
2856 
2857  // East
2858  DSM1_JP_ADC[6]=DSM0_TP_SUM[15]+DSM0_TP_SUM[16]+DSM0_TP_SUM_J1[17];
2859  DSM1_JP_ADC[7]=DSM0_TP_SUM[18]+DSM0_TP_SUM[19]+DSM0_TP_SUM_J3[17];
2860  DSM1_JP_ADC[8]=DSM0_TP_SUM[20]+DSM0_TP_SUM[21]+DSM0_TP_SUM_J1[22];
2861  DSM1_JP_ADC[9]=DSM0_TP_SUM[23]+DSM0_TP_SUM[24]+DSM0_TP_SUM_J3[22];
2862  DSM1_JP_ADC[10]=DSM0_TP_SUM[25]+DSM0_TP_SUM[26]+DSM0_TP_SUM_J1[27];
2863  DSM1_JP_ADC[11]=DSM0_TP_SUM[28]+DSM0_TP_SUM[29]+DSM0_TP_SUM_J3[27];
2864 
2865  for (int hh=0;hh<12;hh++) JP_adc_holder[hh]=DSM1_JP_ADC[hh];
2866 
2867  //Test each JP and see if it passed
2868  for (int i=0;i<kNJet;i++)
2869  {
2870  DSM1_JP_jp_Bit[i]=0;
2871  if ( DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,0)) DSM1_JP_jp_Bit[i]=0;
2872  if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,0))) DSM1_JP_jp_Bit[i]=1;
2873  if ((DSM1_JP_ADC[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) && (DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,1))) DSM1_JP_jp_Bit[i]=2;
2874  if ( DSM1_JP_ADC[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,2)) DSM1_JP_jp_Bit[i]=3;
2875  }
2876 
2877 
2878  int mod;
2879  //Translate JP's into 2 bits to pass to DSMLayer2
2880  for (int i=0;i<kNJet;i++){
2881  if (i < (kNJet/2)) mod = 0;
2882  else mod = 1;
2883  DSM1_ETOT_ADC[mod]+=DSM1_JP_ADC[i];
2884  if ( DSM1_JP_Bit[i/2] < DSM1_JP_jp_Bit[i]) DSM1_JP_Bit[i/2]=DSM1_JP_jp_Bit[i];
2885  }
2886 
2887 
2888  //COMBINE HT3,TP0 and HTTP bits from all channels
2889  for (int i=0; i<kL1DsmModule; i++){
2890  for (int j=0; j<5; j++){
2891  int k= i*5 + j;
2892  int kk=i*5 + 2;
2893 
2894  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit[k]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit[k];
2895  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J3[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J3[kk];
2896  if ( DSM1_HTTP_Bit[i] < DSM0_HTTP_Bit_J1[kk]) DSM1_HTTP_Bit[i]=DSM0_HTTP_Bit_J1[kk];
2897 
2898  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit[k]) DSM1_TP_Bit[i]=DSM0_TP_Bit[k];
2899  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J3[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J3[kk];
2900  if ( DSM1_TP_Bit[i] < DSM0_TP_Bit_J1[kk]) DSM1_TP_Bit[i]=DSM0_TP_Bit_J1[kk];
2901 
2902  if ( DSM1_HT3_Bit[i] < DSM0_HT_Thr3_Bit[k]) DSM1_HT3_Bit[i]=DSM0_HT_Thr3_Bit[k];
2903  if ( DSM1_HT3_Bit[i] < DSM0_HT_Thr3_Bit_J3[kk]) DSM1_HT3_Bit[i]=DSM0_HT_Thr3_Bit_J3[kk];
2904  if ( DSM1_HT3_Bit[i] < DSM0_HT_Thr3_Bit_J1[kk]) DSM1_HT3_Bit[i]=DSM0_HT_Thr3_Bit_J1[kk];
2905 
2906  }
2907  }
2908 
2909 
2910  //WEST HT bits
2911  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[0]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[0];
2912  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit[1]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit[1];
2913  if (DSM1_HTj0_Bit[0]<DSM0_HT_Bit_J3[2]) DSM1_HTj0_Bit[0]=DSM0_HT_Bit_J3[2];
2914  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit_J1[2]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit_J1[2];
2915  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[3]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[3];
2916  if (DSM1_HTj1_Bit[0]<DSM0_HT_Bit[4]) DSM1_HTj1_Bit[0]=DSM0_HT_Bit[4];
2917 
2918  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[5]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[5];
2919  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit[6]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit[6];
2920  if (DSM1_HTj0_Bit[1]<DSM0_HT_Bit_J3[7]) DSM1_HTj0_Bit[1]=DSM0_HT_Bit_J3[7];
2921  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit_J1[7]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit_J1[7];
2922  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[8]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[8];
2923  if (DSM1_HTj1_Bit[1]<DSM0_HT_Bit[9]) DSM1_HTj1_Bit[1]=DSM0_HT_Bit[9];
2924 
2925  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[10]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[10];
2926  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit[11]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit[11];
2927  if (DSM1_HTj0_Bit[2]<DSM0_HT_Bit_J3[12]) DSM1_HTj0_Bit[2]=DSM0_HT_Bit_J3[12];
2928  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit_J1[12]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit_J1[12];
2929  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[13]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[13];
2930  if (DSM1_HTj1_Bit[2]<DSM0_HT_Bit[14]) DSM1_HTj1_Bit[2]=DSM0_HT_Bit[14];
2931 
2932  //EAST HT bits
2933  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[15]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[15];
2934  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit[16]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit[16];
2935  if (DSM1_HTj0_Bit[3]<DSM0_HT_Bit_J1[17]) DSM1_HTj0_Bit[3]=DSM0_HT_Bit_J1[17];
2936  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit_J3[17]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit_J3[17];
2937  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[18]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[18];
2938  if (DSM1_HTj1_Bit[3]<DSM0_HT_Bit[19]) DSM1_HTj1_Bit[3]=DSM0_HT_Bit[19];
2939 
2940  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[20]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[20];
2941  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit[21]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit[21];
2942  if (DSM1_HTj0_Bit[4]<DSM0_HT_Bit_J1[22]) DSM1_HTj0_Bit[4]=DSM0_HT_Bit_J1[22];
2943  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit_J3[22]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit_J3[22];
2944  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[23]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[23];
2945  if (DSM1_HTj1_Bit[4]<DSM0_HT_Bit[24]) DSM1_HTj1_Bit[4]=DSM0_HT_Bit[24];
2946 
2947  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[25]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[25];
2948  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit[26]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit[26];
2949  if (DSM1_HTj0_Bit[5]<DSM0_HT_Bit_J1[27]) DSM1_HTj0_Bit[5]=DSM0_HT_Bit_J1[27];
2950  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit_J3[27]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit_J3[27];
2951  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[28]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[28];
2952  if (DSM1_HTj1_Bit[5]<DSM0_HT_Bit[29]) DSM1_HTj1_Bit[5]=DSM0_HT_Bit[29];
2953 
2954 
2955  //Drop two lowest bits for ETOT and OR Bits>6 with 6
2956  for (int i=0;i<kL1DsmModule;i++) {
2957  DSM1_ETOT_ADC[i]/=4;
2958  if (DSM1_ETOT_ADC[i]>31) DSM1_ETOT_ADC[i]=31;
2959  }
2960 
2961 
2962 #ifdef DEBUG
2963 
2964  if (mHeadMaker->GetDataSet("MuDst")) {
2965  StEmcTriggerDetector& emcTrig = StMuDst::event()->emcTriggerDetector();
2966  static const int dsm_read_map[] = { 3, 2, 1, 0, 7, 6, 5, 4 };
2967  static const int TriggerBankToSimuMap[] = { 3, 4, 5, 0, 1, 2 };
2968  for (int dsm = 0; dsm < kL2DsmModule; ++dsm) {
2969  for (int ch = 0; ch < 6; ++ch) {
2970  int idx = dsm_read_map[ch];
2971  int TrigBankOut = emcTrig.emcLayer2(idx);
2972  int jetPatch = 2 * TriggerBankToSimuMap[ch];
2973  int sum = DSM1_JP_ADC[jetPatch] + DSM1_JP_ADC[jetPatch+1];
2974  sum = (sum >> 7) ? 31 : (sum >> 2 & 0x1f);
2975  int diff = (TrigBankOut & 0x1f) - (sum & 0x1f);
2976  mBEMCLayer2PatchSum->Fill(ch, TrigBankOut & 0x1f);
2977  mBEMCLayer2PatchSumDiff->Fill(ch, diff);
2978  diff = (TrigBankOut >> 7 & 0x1) - (DSM1_HT3_Bit[TriggerBankToSimuMap[ch]]);
2979  mBEMCLayer2HT3Bits->Fill(ch, TrigBankOut >> 7 & 0x1);
2980  mBEMCLayer2HT3BitsDiff->Fill(ch,diff);
2981  diff = (TrigBankOut >> 8 & 0x1) - (DSM1_TP_Bit[TriggerBankToSimuMap[ch]]);
2982  mBEMCLayer2TPBits->Fill(ch, TrigBankOut >> 8 & 0x1);
2983  mBEMCLayer2TPBitsDiff->Fill(ch,diff);
2984  diff = (TrigBankOut >> 9 & 0x1) - (DSM1_HTTP_Bit[TriggerBankToSimuMap[ch]]);
2985  mBEMCLayer2HTTPBits->Fill(ch, TrigBankOut >> 9 & 0x1);
2986  mBEMCLayer2HTTPBitsDiff->Fill(ch,diff);
2987  diff = (TrigBankOut >> 10 & 0x3) - (DSM1_JP_Bit[TriggerBankToSimuMap[ch]]);
2988  mBEMCLayer2JPBits->Fill(ch, TrigBankOut >> 10 & 0x3);
2989  mBEMCLayer2JPBitsDiff->Fill(ch, diff);
2990  diff = (TrigBankOut >> 12 & 0x3) - (DSM1_HTj0_Bit[TriggerBankToSimuMap[ch]]);
2991  mBEMCLayer2HTj0Bits->Fill(ch, TrigBankOut >> 12 & 0x3);
2992  mBEMCLayer2HTj0BitsDiff->Fill(ch,diff);
2993  diff = (TrigBankOut >> 14 & 0x3) - (DSM1_HTj1_Bit[TriggerBankToSimuMap[ch]]);
2994  mBEMCLayer2HTj1Bits->Fill(ch, TrigBankOut >> 14 & 0x3);
2995  mBEMCLayer2HTj1BitsDiff->Fill(ch,diff);
2996 
2997  }
2998  }
2999  }
3000 #endif
3001 
3002 }
3003 
3004 void StBemcTriggerSimu::get2008pp_DSMLayer2()
3005 {
3006 
3007  // In hardware the final trigger decisions are made in the TCU
3008  // It is not possible to compare the emulator with the TCU input
3009  // so all final trigger decisions for the BEMC are made at Layer2
3010  // in this code
3011 
3012  Int_t DSM2_HT_Bit=0;
3013 
3014  for (int dsm = 0; dsm < kL1DsmModule; ++dsm) {
3015 
3016  if (DSM2_HT_Bit<DSM1_HTj0_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj0_Bit[dsm];
3017  if (DSM2_HT_Bit<DSM1_HTj1_Bit[dsm]) DSM2_HT_Bit=DSM1_HTj1_Bit[dsm];
3018 
3019  }
3020 
3021  //HT0
3022  if (DSM2_HT_Bit > 0) mFiredTriggers.push_back(220500);
3023  //HT1
3024  if (DSM2_HT_Bit > 1) mFiredTriggers.push_back(220510);
3025  //HT2
3026  if (DSM2_HT_Bit > 2) mFiredTriggers.push_back(220520);
3027 
3028 
3029 }
3030 
3031 //==================================================
3032 
3033 void StBemcTriggerSimu::get2009_DSMLayer0()
3034 {
3035  // Loop over 30 modules
3036  for (int dsm = 0; dsm < kL0DsmModule; ++dsm) {
3037  TString line = (*mB001)[dsm].name + ": ";
3038  // Loop over 10 input channels to each module
3039  for (int ch = 0 ; ch < kL0DsmInputs; ++ch) {
3040  int tpid = dsm*kL0DsmInputs+ch;
3041  (*mB001)[dsm].channels[ch] = L0_HT_ADC[tpid] | L0_TP_ADC[tpid] << 6;
3042  line += Form("%04x ",(*mB001)[dsm].channels[ch]);
3043  } // End loop over channels
3044  LOG_DEBUG << line << endm;
3045  } // End loop over modules
3046 
3047  // Emulate BEMC layer 0
3048  mB001->run();
3049 }
3050 
3051 //==================================================
3052 
3053 void StBemcTriggerSimu::get2009_DSMLayer1()
3054 {
3055  // Get input from BEMC layer 0
3056  mB001->write(*mB101);
3057 
3058  // LOG_DEBUG messages
3059  for (size_t dsm = 0; dsm < mB101->size(); ++dsm) {
3060  TString line = (*mB101)[dsm].name + ": ";
3061  for (int ch = 0; ch < 8; ++ch) line += Form("%04x ",(*mB101)[dsm].channels[ch]);
3062  LOG_DEBUG << line << endm;
3063  }
3064 
3065  // Emulate BEMC layer 1
3066  mB101->run();
3067 }
3068 
3069 //==================================================
3070 
3071 
3072 const vector< pair<int,int> > StBemcTriggerSimu::getTowersAboveThreshold(int trigId) const {
3073  vector< pair<int,int> > towers;
3074 
3075  for (int i=0;i<kNTowers;i++)
3076  {
3077  int tpid = -1;
3078  int dsmid = -1;
3079 
3080  mDecoder->GetTriggerPatchFromTowerId(i,tpid);
3081  mDecoder->GetDSMFromTriggerPatch(tpid,dsmid);
3082 
3083  if (trigId==210500 || trigId==210501 || trigId==220500) {
3084  if (HT6bit_adc_holder[i] > mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,0)) {
3085  towers.push_back( make_pair(i+1,HT6bit_adc_holder[i]) );
3086  }
3087  }
3088  if (trigId==127611 || trigId==127821 || trigId==137821 || trigId==137822 || trigId==137611 || trigId==5 ||
3089  trigId==200601 || trigId==200602 || trigId==200213 || trigId==200214 || trigId==210510 || trigId==210511 ||
3090  trigId==220510) {
3091  if (HT6bit_adc_holder[i] > mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,1)) {
3092  towers.push_back( make_pair(i+1,HT6bit_adc_holder[i]) );
3093  }
3094  }
3095  if (trigId==127212 || trigId==137213 || trigId==200211 || trigId==200212 || trigId==200220 || trigId==200221 ||
3096  trigId==200222 || trigId==200620 || trigId==200621 || trigId==210520 || trigId==210521 || trigId==220520) {
3097  if (HT6bit_adc_holder[i] > mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,2)) {
3098  towers.push_back( make_pair(i+1,HT6bit_adc_holder[i]) );
3099  }
3100  }
3101  if (trigId==210541){
3102  if (HT6bit_adc_holder[i] > mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,4)) {
3103  towers.push_back( make_pair(i+1,HT6bit_adc_holder[i]) );
3104  }
3105  }
3106  }
3107  return towers;
3108 }
3109 
3110 
3111 const vector< pair<int,int> > StBemcTriggerSimu::getTriggerPatchesAboveThreshold(int trigId) const {
3112  vector< pair<int,int> > patches;
3113 
3114  for (int i=0;i<kNPatches;i++)
3115  {
3116  int dsmid;
3117  mDecoder->GetDSMFromTriggerPatch(i,dsmid);
3118 
3119  if (trigId==127611 || trigId==127821 || trigId==137821 || trigId==137822 || trigId==137611 || trigId==5) {
3120  if (TP6bit_adc_holder[i] > mDbThres->GetTP_DSM0_threshold(dsmid,timestamp,1)) {
3121  //cout << "In getTPAboveThreshold: " << i+1 << "\tTP: " << TP6bit_adc_holder[i] <<" dsmid"<<dsmid<<" tpid="<<i<< endl;
3122  patches.push_back( make_pair(i,TP6bit_adc_holder[i]) );
3123  }
3124  }
3125  }
3126  return patches;
3127 }
3128 
3129 
3130 const vector< pair<int,int> > StBemcTriggerSimu::getJetPatchesAboveThreshold(int trigId) const {
3131  vector< pair<int,int> > patches;
3132 
3133  for (int i=0;i<kNJet;i++)
3134  {
3135  if ((JP_adc_holder[i] <= mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) && (JP_adc_holder[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,0))) {
3136  if (trigId==127501 || trigId==137501 || trigId==127622 || trigId==137622) {
3137  patches.push_back( make_pair(i,JP_adc_holder[i]) );
3138  }
3139  }
3140  if (JP_adc_holder[i] > mDbThres->GetJP_DSM1_threshold(i,timestamp,1)) {
3141  if (trigId==127221 || trigId==137221 || trigId==137222 || trigId==127501 || trigId==137501 || trigId==127622 || trigId==137622) {
3142  patches.push_back( make_pair(i,JP_adc_holder[i]) );
3143  }
3144  }
3145  }
3146  return patches;
3147 }
3148 
3149 
3150 int StBemcTriggerSimu::getTowerThreshold(int trigId, int dsmid) const {
3151  int threshold =-1;
3152 
3153  if (trigId==127611 || trigId==127821 || trigId==137821 || trigId==137822 || trigId==137611 || trigId==5) {
3154  threshold = mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,1);
3155  }
3156  if (trigId==127212 || trigId==137213) {
3157  threshold = mDbThres->GetHT_DSM0_threshold(dsmid,timestamp,2);
3158  }
3159 
3160  return threshold;
3161 }
3162 
3163 
3164 int StBemcTriggerSimu::getTriggerPatchThreshold(int trigId, int dsmid) const {
3165  int threshold = -1;
3166 
3167  if (trigId==127611 || trigId==127821 || trigId==137821 || trigId==137822 || trigId==137611 || trigId==5) {
3168  threshold = mDbThres->GetTP_DSM0_threshold(dsmid,timestamp,1);
3169  }
3170  return threshold;
3171 }
3172 
3173 
3174 int StBemcTriggerSimu::getJetPatchThreshold(int trigId, int dsmid) const {
3175  int threshold = -1;
3176 
3177  if (trigId==127501 || trigId==137501 || trigId==127622 || trigId==137622) {
3178  threshold = mDbThres->GetJP_DSM1_threshold(dsmid,timestamp,0);
3179  }
3180  if (trigId==127221 || trigId==137221 || trigId==137222) {
3181  threshold = mDbThres->GetJP_DSM1_threshold(dsmid,timestamp,1);
3182  }
3183 
3184  return threshold;
3185 }
3186 
3187 
3188 int StBemcTriggerSimu::barrelJetPatchTh(int i) const { return mB101->getRegister(i); }
3189 int StBemcTriggerSimu::barrelHighTowerTh(int i) const { return mB001->getRegister(i); }
3190 int StBemcTriggerSimu::barrelJetPatchAdc(int jp) const { return (*mB101)[jp%6].info[(jp/6+2)%3]; }
3191 int StBemcTriggerSimu::barrelPartialJetPatchAdc(int jp) const { //jp from 0 to 5, 6 high eta partical jet patch sum
3192 return (*mB101)[jp%6].info[3]; }
3193 
3194 void StBemcTriggerSimu::fillStEmcTriggerDetector()
3195 {
3196  if (mEvent && mEvent->triggerDetectorCollection()) {
3197  StEmcTriggerDetector& emc = mEvent->triggerDetectorCollection()->emc();
3198  for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
3199  emc.setHighTower(triggerPatch,getBEMC_FEE_HT_ADC()[triggerPatch]);
3200  emc.setPatch(triggerPatch,getBEMC_FEE_TP_ADC()[triggerPatch]);
3201  }
3202  }
3203  if (StMuDst::event()) {
3204  StEmcTriggerDetector& emc = StMuDst::event()->emcTriggerDetector();
3205  for (int triggerPatch = 0; triggerPatch < kNPatches; ++triggerPatch) {
3206  emc.setHighTower(triggerPatch,getBEMC_FEE_HT_ADC()[triggerPatch]);
3207  emc.setPatch(triggerPatch,getBEMC_FEE_TP_ADC()[triggerPatch]);
3208  }
3209  }
3210 }
St_db_Maker
Definition: St_db_Maker.h:141
DSMLayer_B001_2015
Definition: DSMLayer_B001_2015.hh:6
DSMLayer_B101_2015
Definition: DSMLayer_B101_2015.hh:6
StEmcDecoder::GetJetPatchFromTowerId
int GetJetPatchFromTowerId(int softId, int &jetPatch) const
Get jet patch that contains software Id.
Definition: StEmcDecoder.cxx:581
StEmcSimulatorMaker::getTables
StBemcTables * getTables()
pointer to database tables
Definition: StEmcSimulatorMaker.h:134
StBemcTables::getTriggerFormulaParameters
void getTriggerFormulaParameters(Int_t crate, Int_t index, Int_t *parameters) const
Return LUT formula parameters.
Definition: StBemcTables.cxx:461
StEmcADCtoEMaker::isCorrupted
Bool_t isCorrupted()
Returns if BTOW is corrupted or not.
Definition: StEmcADCtoEMaker.cxx:239
StBemcTables::status
int status(int det, int softId, const char *option="") const
Definition: StBemcTables.cxx:498
StBemcTables::getTriggerBitConv
void getTriggerBitConv(Int_t crate, Int_t patch, Int_t &bit) const
Return 6 bits conversion mode.
Definition: StBemcTables.cxx:440
StBemcTables::getTriggerTowerStatus
void getTriggerTowerStatus(Int_t crate, Int_t index, Int_t &status) const
Return trigger single tower status.
Definition: StBemcTables.cxx:428
StEmcADCtoEMaker::getBemcData
StBemcData * getBemcData()
Return the StBemcData pointer.
Definition: StEmcADCtoEMaker.h:58
StEmcRawMaker::getBemcRaw
StBemcRaw * getBemcRaw()
Return the StBemcRaw pointer.
Definition: StEmcRawMaker.h:95
StBemcRaw::getTables
StBemcTables * getTables()
Return the StBemcTable pointer.
Definition: StBemcRaw.h:207
StBemcTables::getPedestal
void getPedestal(Int_t det, Int_t softId, Int_t cap, Float_t &ped, Float_t &rms) const
Return pedestal mean and rms.
Definition: StBemcTables.cxx:301
StBemcTables::getTriggerPatchStatus
void getTriggerPatchStatus(Int_t patch, Int_t &status) const
Return trigger patch status.
Definition: StBemcTables.cxx:416
DSMLayer_B001_2014_B
Definition: DSMLayer_B001_2014_B.hh:6
StEmcDecoder::GetTowerIdFromCrate
int GetTowerIdFromCrate(int crate, int sequence, int &softId) const
Get Software Id from Crate number and position in crate for towers.
Definition: StEmcDecoder.cxx:218
StEmcDecoder::GetCrateAndSequenceFromTriggerPatch
int GetCrateAndSequenceFromTriggerPatch(int patchId, int &crate, int &sequence) const
returns the crate number and start point for a given trigger patch
Definition: StEmcDecoder.cxx:262
StBemcTables::getTriggerFormulaTag
void getTriggerFormulaTag(Int_t crate, Int_t index, Int_t &formula) const
Return LUT formula.
Definition: StBemcTables.cxx:457
StEmcDecoder::GetCrateFromTowerId
int GetCrateFromTowerId(int softId, int &crate, int &sequence) const
Get crate number and position in crate for Software Id.
Definition: StEmcDecoder.cxx:556
DSMLayer_B101_2013
Definition: DSMLayer_B101_2013.hh:7
StMuDst::event
static StMuEvent * event()
returns pointer to current StMuEvent (class holding the event wise information, e.g. event number, run number)
Definition: StMuDst.h:320
StBemcTables::getCalib
void getCalib(Int_t det, Int_t softId, Int_t power, Float_t &calib) const
Return calibration constant.
Definition: StBemcTables.cxx:395
StEmcDecoder::GetJetPatchAndSequenceFromTriggerPatch
int GetJetPatchAndSequenceFromTriggerPatch(int patchId, int &jetPatch, int &sequence) const
return the big jet patch and sequence number within it from the
Definition: StEmcDecoder.cxx:302
StBemcTables::getTriggerHighTowerStatus
void getTriggerHighTowerStatus(Int_t hightower, Int_t &status) const
Return trigger highTower status.
Definition: StBemcTables.cxx:422
StMaker::GetRunNumber
virtual Int_t GetRunNumber() const
Returns the current RunNumber.
Definition: StMaker.cxx:1054
StBemcTables::getTriggerPedestal
void getTriggerPedestal(Int_t crate, Int_t index, Float_t &pedestal) const
Return tower pedestal loaded in trigger.
Definition: StBemcTables.cxx:434
StBemcTables::getTriggerPedestalShift
void getTriggerPedestalShift(Int_t &pedestalShift) const
Return target pedestal shift.
Definition: StBemcTables.cxx:447
StEmcDecoder::GetTriggerPatchFromTowerId
int GetTriggerPatchFromTowerId(int softId, int &patchId) const
Get trigger patch that contains software Id.
Definition: StEmcDecoder.cxx:573
DSMLayer_B001_2009
Definition: DSMLayer_B001_2009.hh:11
DSMLayer_B101_2009
Definition: DSMLayer_B101_2009.hh:11
DSMLayer_B101_2014_B
Definition: DSMLayer_B101_2014_B.hh:6
StBemcTables::getStatus
void getStatus(Int_t det, Int_t softId, Int_t &status, const char *option="") const
Return status.
Definition: StBemcTables.cxx:341
StBemcTriggerSimu::triggerDecision
StTriggerSimuDecision triggerDecision(int trigId)
like isTrigger(), but returns kDoNotCare if detector isn&#39;t a part of the given trigId ...
Definition: StBemcTriggerSimu.cxx:363
StEmcDecoder::GetDSMFromTriggerPatch
int GetDSMFromTriggerPatch(int patchId, int &dsmModule) const
dsmModule is set to the DSM module containing this trigger patch (0-299)
Definition: StEmcDecoder.cxx:317
StEmcDecoder::GetTriggerPatchesFromDSM
int GetTriggerPatchesFromDSM(int dsmModule, int *triggerPatches) const
triggerPatches is an int[10]; contents will be set to the TPs of the supplied DSM # ...
Definition: StEmcDecoder.cxx:324
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