3 #ifndef STAR_StBemcTriggerSimu
4 #define STAR_StBemcTriggerSimu
18 #include "StTriggerUtilities/StVirtualTriggerSimu.h"
19 #include "StTriggerUtilities/StTriggerSimuResult.h"
26 #define kNChannels 160
28 #define kL0DsmModule 30
29 #define kL0DsmInputs 10
30 #define kNLayer0out 36
31 #define kL1DsmModule 6
32 #define kL1DsmInputs 6
33 #define kL2DsmModule 1
53 std::vector<int> mFiredTriggers;
54 std::set<int> mAllTriggers;
56 std::vector<int> layer0;
57 std::vector<int> layer1;
58 std::vector<int> layer2;
78 Int_t DSM_HTStatus[kNPatches];
79 Int_t DSM_TPStatus[kNPatches];
80 Int_t TowerStatus[kNTowers];
81 Float_t TowerGain[kNTowers];
82 unsigned long bitConvValue[kNTowers];
83 Int_t year,yyyymmdd,hhmmss;
87 int TriggerPatchFromTowerId[kNTowers];
88 int TriggerPatchFromCrate[kNCrates][kNSeq];
90 Int_t adc12[kNTowers];
91 Int_t adc10[kNTowers],adc08[kNTowers];
92 Float_t ped12[kNTowers];
93 Int_t FEEped[kNTowers];
94 Int_t HTadc06[kNTowers];
96 unsigned long pedTargetValue;
97 Float_t ped12Diff, ped10Diff;
100 Int_t formula[kNCrates][kNSeq], numMaskTow[kNPatches];
101 Int_t LUTscale[kNCrates][kNSeq], LUTped[kNCrates][kNSeq], LUTsig[kNCrates][kNSeq], LUTpow[kNCrates][kNSeq];
105 Int_t L0_HT_ADC[kNPatches], L0_TP_ADC[kNPatches], L0_TP_PED[kNPatches];
108 Int_t DSM0_TP_SUM[kL0DsmModule], DSM0_TP_SUM_J1[kL0DsmModule], DSM0_TP_SUM_J3[kL0DsmModule];
109 Int_t DSM1_JP_ADC[kL0DsmModule];
114 Int_t DSM0_HT_Bit[kL0DsmModule],DSM0_TP_Bit[kL0DsmModule],DSM0_HTTP_Bit[kL0DsmModule];
115 Int_t DSM0_HT_Bit_J3[kL0DsmModule],DSM0_TP_Bit_J3[kL0DsmModule],DSM0_HTTP_Bit_J3[kL0DsmModule];
116 Int_t DSM0_HT_Bit_J1[kL0DsmModule],DSM0_TP_Bit_J1[kL0DsmModule],DSM0_HTTP_Bit_J1[kL0DsmModule];
117 Int_t DSM0_HT_2Bit[kL0DsmModule],DSM0_HT_2Bit_J1[kL0DsmModule],DSM0_HT_2Bit_J3[kL0DsmModule];
118 Int_t DSM0_HT_Thr3_Bit[kL0DsmModule], DSM0_HT_Thr3_Bit_J1[kL0DsmModule], DSM0_HT_Thr3_Bit_J3[kL0DsmModule];
119 Int_t DSM0_HT_Masked_Bit[kL0DsmModule], DSM0_HT_Masked_Bit_J1[kL0DsmModule], DSM0_HT_Masked_Bit_J3[kL0DsmModule];
122 Int_t DSM0_HT_tp_Bit[kL0DsmInputs], DSM0_TP_tp_Bit[kL0DsmInputs], DSM0_HTTP_tp_Bit[kL0DsmInputs];
123 Int_t DSM0_HT_Thr3_tp_Bit[kL0DsmModule], DSM0_HT_Thr3_tp_Bit_J1[kL0DsmModule], DSM0_HT_Thr3_tp_Bit_J3[kL0DsmModule];
124 Int_t DSM0_HT_tp_Bit_J3[kL0DsmInputs], DSM0_TP_tp_Bit_J3[kL0DsmInputs],DSM0_HTTP_tp_Bit_J3[kL0DsmInputs];
125 Int_t DSM0_HT_tp_Bit_J1[kL0DsmInputs], DSM0_TP_tp_Bit_J1[kL0DsmInputs],DSM0_HTTP_tp_Bit_J1[kL0DsmInputs];
126 Int_t L0_16bit_Out[kNLayer0out];
128 Int_t DSM1_JP_Bit[kL1DsmModule], DSM1_HT_Bit[kL1DsmModule], DSM1_TP_Bit[kL1DsmModule], DSM1_HTTP_Bit[kL1DsmModule];
129 Int_t DSM1_HTj1_Bit[kL1DsmModule], DSM1_HTj0_Bit[kL1DsmModule], DSM1_HT3_Bit[kL1DsmModule];
130 Int_t DSM1_ETOT_ADC[kL1DsmModule];
132 Int_t DSM1_JP_jp_Bit[kNJet];
135 Int_t HT6bit_adc_holder[kNTowers];
136 Int_t TP6bit_adc_holder[kNPatches];
137 Int_t JP_adc_holder[kNJet];
140 vector< pair<int,int> > mJpsiCandidates;
146 void getTowerStatus();
147 void getDSM_TPStatus();
148 void getDSM_HTStatus();
151 void GetTriggerPatchFromCrate(
int crate,
int seq,
int& triggerPatch)
const;
154 void FEEini2009(
int runNumber);
156 void switchoff(
int& x,
int n)
const { x &= ~(1 << n); }
157 void switchon (
int& x,
int n)
const { x |= (1 << n); }
158 void simulateFEEfailure();
159 void get2006_DSMLayer0();
160 void get2006_DSMLayer1();
161 void get2006_DSMLayer2();
162 void get2006_JpsiCandidates(
const vector<int>& towerIds1,
const vector<int>& towerIds2);
163 void get2007_DSMLayer0();
164 void get2007_DSMLayer1();
165 void get2007_DSMLayer2();
166 void get2008dAu_DSMLayer0();
167 void get2008dAu_DSMLayer1();
168 void get2008dAu_DSMLayer2();
169 void get2008pp_DSMLayer0();
170 void get2008pp_DSMLayer1();
171 void get2008pp_DSMLayer2();
172 void get2009_DSMLayer0();
173 void get2009_DSMLayer1();
179 TH2 *mBEMCLayer0HT6bit;
180 TH2 *mBEMCLayer0TP6bit;
181 TH2 *mBEMCLayer0HT6bitDiff;
182 TH2 *mBEMCLayer0TP6bitDiff;
183 TH2 *mBEMCLayer1HTBits;
184 TH2 *mBEMCLayer1HTBitsDiff;
185 TH2 *mBEMCLayer1TPBits;
186 TH2 *mBEMCLayer1TPBitsDiff;
187 TH2 *mBEMCLayer1HTTPBits;
188 TH2 *mBEMCLayer1HTTPBitsDiff;
189 TH2 *mBEMCLayer1PatchSum;
190 TH2 *mBEMCLayer1PatchSumDiff;
191 TH2 *mBEMCLayer1HTmaskBits;
192 TH2 *mBEMCLayer1HTmaskDiff;
193 TH2 *mBEMCLayer1HTthr3Bits;
194 TH2 *mBEMCLayer1HTthr3Diff;
195 TH2 *mBEMCLayer2PatchSum;
196 TH2 *mBEMCLayer2PatchSumDiff;
197 TH2 *mBEMCLayer2HT3Bits;
198 TH2 *mBEMCLayer2HT3BitsDiff;
199 TH2 *mBEMCLayer2HTTPBits;
200 TH2 *mBEMCLayer2HTTPBitsDiff;
201 TH2 *mBEMCLayer2TPBits;
202 TH2 *mBEMCLayer2TPBitsDiff;
203 TH2 *mBEMCLayer2JPBits;
204 TH2 *mBEMCLayer2JPBitsDiff;
205 TH2 *mBEMCLayer2HTj0Bits;
206 TH2 *mBEMCLayer2HTj0BitsDiff;
207 TH2 *mBEMCLayer2HTj1Bits;
208 TH2 *mBEMCLayer2HTj1BitsDiff;
217 void InitRun(
int runnumber);
221 bool isCorrupted()
const;
223 const vector<int>& triggerIds()
const {
return mFiredTriggers; }
227 void setHList(TObjArray * x){mHList=x;}
229 int barrelJetPatchTh(
int i)
const;
230 int barrelHighTowerTh(
int i)
const;
232 int barrelJetPatchAdc(
int jp)
const;
233 int barrelPartialJetPatchAdc(
int jp)
const;
234 int barrelHighTowerAdc(
int towerId)
const {
return getHT6bitAdc(towerId); }
237 enum {kOnline=1, kOffline, kExpert};
238 void setConfig(
int x) {mConfig=x;}
239 void setBemcStatus(
const char* bemcStatus) { mBemcStatus = bemcStatus; }
247 Int_t* getBEMC_FEE_HT_ADC() {
return L0_HT_ADC;}
248 Int_t* getBEMC_FEE_TP_ADC() {
return L0_TP_ADC;}
249 int getHT6bitAdc(
int towerId)
const {
return HT6bit_adc_holder[towerId-1]; }
250 int getTP6bitAdc(
int triggerPatch)
const {
return TP6bit_adc_holder[triggerPatch]; }
253 Int_t* getBEMC_L0_OUT() {
return L0_16bit_Out;}
254 Int_t* getBEMC_L0_SUM() {
return DSM0_TP_SUM;}
255 Int_t* getBEMC_L0_SUM_J1() {
return DSM0_TP_SUM_J1;}
256 Int_t* getBEMC_L0_SUM_J3() {
return DSM0_TP_SUM_J3;}
257 Int_t* getBEMC_L0_HT_Bit() {
return DSM0_HT_Bit;}
258 Int_t* getBEMC_L0_HT_Bit_J1() {
return DSM0_HT_Bit_J3;}
259 Int_t* getBEMC_L0_HT_Bit_J3() {
return DSM0_HT_Bit_J1;}
260 Int_t* getBEMC_L0_TP_Bit() {
return DSM0_TP_Bit;}
261 Int_t* getBEMC_L0_TP_Bit_J1() {
return DSM0_TP_Bit_J3;}
262 Int_t* getBEMC_L0_TP_Bit_J3() {
return DSM0_TP_Bit_J1;}
263 Int_t* getBEMC_L0_HTTP_Bit() {
return DSM0_HTTP_Bit;}
264 Int_t* getBEMC_L0_HTTP_Bit_J1() {
return DSM0_HTTP_Bit_J3;}
265 Int_t* getBEMC_L0_HTTP_Bit_J3() {
return DSM0_HTTP_Bit_J1;}
269 Int_t* getBEMC_L1_JP() {
return DSM1_JP_Bit;}
270 Int_t* getBEMC_L1_HT() {
return DSM1_HT_Bit;}
271 Int_t* getBEMC_L1_TP() {
return DSM1_TP_Bit;}
272 Int_t* getBEMC_L1_HTTP() {
return DSM1_HTTP_Bit;}
273 Int_t* getBEMC_L1_ETOT_ADC() {
return DSM1_ETOT_ADC;}
276 const vector< pair<int, int> > getTowersAboveThreshold(
int trigId)
const;
277 const vector< pair<int, int> > getTriggerPatchesAboveThreshold(
int trigId)
const;
278 const vector< pair<int, int> > getJetPatchesAboveThreshold(
int trigId)
const;
279 const vector< pair<int,int> >& getJpsiCandidates()
const {
return mJpsiCandidates; }
280 int numberOfJpsiCandidates()
const {
return mJpsiCandidates.size(); }
281 const pair<int,int>& jpsiCandidate(
int i)
const {
return mJpsiCandidates[i]; }
282 int jpsiCandidateFirstTowerId(
int i)
const {
return mJpsiCandidates[i].first; }
283 int jpsiCandidateSecondTowerId(
int i)
const {
return mJpsiCandidates[i].second; }
286 int getTowerThreshold(
int trigId,
int dsmid)
const;
287 int getTriggerPatchThreshold(
int trigId,
int dsmid)
const;
288 int getJetPatchThreshold(
int trigId,
int dsmid)
const;
295 void fillStEmcTriggerDetector();
StTriggerSimuDecision triggerDecision(int trigId)
like isTrigger(), but returns kDoNotCare if detector isn't a part of the given trigId ...
void setTables(StBemcTables *tab)
default tables come from emcSim or adc2e, but you can supply your own if you prefer ...